diff options
-rw-r--r-- | llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h | 5 | ||||
-rw-r--r-- | llvm/test/TableGen/GlobalISelEmitter.td | 1 | ||||
-rw-r--r-- | llvm/utils/TableGen/GlobalISelEmitter.cpp | 14 |
3 files changed, 14 insertions, 6 deletions
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h index 033d9365e7a..bab91b64c3f 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h @@ -390,6 +390,10 @@ public: GISelKnownBits *KnownBits = nullptr; MachineFunction *MF = nullptr; + virtual void setupGeneratedPerFunctionState(MachineFunction &MF) { + llvm_unreachable("TableGen should have emitted implementation"); + } + /// Setup per-MF selector state. virtual void setupMF(MachineFunction &mf, GISelKnownBits &KB, @@ -397,6 +401,7 @@ public: CoverageInfo = &covinfo; KnownBits = &KB; MF = &mf; + setupGeneratedPerFunctionState(mf); } protected: diff --git a/llvm/test/TableGen/GlobalISelEmitter.td b/llvm/test/TableGen/GlobalISelEmitter.td index 59816497cc9..55d2375084d 100644 --- a/llvm/test/TableGen/GlobalISelEmitter.td +++ b/llvm/test/TableGen/GlobalISelEmitter.td @@ -217,7 +217,6 @@ def HasC : Predicate<"Subtarget->hasC()"> { let RecomputePerFunction = 1; } // CHECK: bool MyTargetInstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const { // CHECK-NEXT: MachineFunction &MF = *I.getParent()->getParent(); // CHECK-NEXT: MachineRegisterInfo &MRI = MF.getRegInfo(); -// CHECK: AvailableFunctionFeatures = computeAvailableFunctionFeatures(&STI, &MF); // CHECK-NEXT: const PredicateBitset AvailableFeatures = getAvailableFeatures(); // CHECK-NEXT: NewMIVector OutMIs; // CHECK-NEXT: State.MIs.clear(); diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp index 99b067d5b52..ba45d8d170c 100644 --- a/llvm/utils/TableGen/GlobalISelEmitter.cpp +++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp @@ -5157,9 +5157,16 @@ void GlobalISelEmitter::run(raw_ostream &OS) { }); SubtargetFeatureInfo::emitComputeAvailableFeatures( - Target.getName(), "InstructionSelector", "computeAvailableModuleFeatures", + Target.getName(), "InstructionSelector", "computeAvailableModuleFeatures", ModuleFeatures, OS); + + OS << "void " << Target.getName() << "InstructionSelector" + "::setupGeneratedPerFunctionState(MachineFunction &MF) {\n" + " AvailableFunctionFeatures = computeAvailableFunctionFeatures(" + "(const " << Target.getName() << "Subtarget*)&MF.getSubtarget(), &MF);\n" + "}\n"; + if (Target.getName() == "X86" || Target.getName() == "AArch64") { // TODO: Implement PGSO. OS << "static bool shouldOptForSize(const MachineFunction *MF) {\n"; @@ -5311,10 +5318,6 @@ void GlobalISelEmitter::run(raw_ostream &OS) { "&CoverageInfo) const {\n" << " MachineFunction &MF = *I.getParent()->getParent();\n" << " MachineRegisterInfo &MRI = MF.getRegInfo();\n" - << " // FIXME: This should be computed on a per-function basis rather " - "than per-insn.\n" - << " AvailableFunctionFeatures = computeAvailableFunctionFeatures(&STI, " - "&MF);\n" << " const PredicateBitset AvailableFeatures = getAvailableFeatures();\n" << " NewMIVector OutMIs;\n" << " State.MIs.clear();\n" @@ -5350,6 +5353,7 @@ void GlobalISelEmitter::run(raw_ostream &OS) { << "computeAvailableFunctionFeatures(const " << Target.getName() << "Subtarget *Subtarget,\n" << " const MachineFunction *MF) const;\n" + << "void setupGeneratedPerFunctionState(MachineFunction &MF) override;\n" << "#endif // ifdef GET_GLOBALISEL_PREDICATES_DECL\n"; OS << "#ifdef GET_GLOBALISEL_PREDICATES_INIT\n" |