diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp index 9d5098c6db5..04fadf97609 100644 --- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp +++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp @@ -1149,10 +1149,6 @@ AArch64LoadStoreOpt::findMatchingInsn(MachineBasicBlock::iterator I, int Offset = getLdStOffsetOp(FirstMI).getImm(); bool IsNarrowStore = isNarrowStore(Opc); - // For narrow stores, find only the case where the stored value is WZR. - if (IsNarrowStore && Reg != AArch64::WZR) - return E; - // Early exit if the offset is not possible to match. (6 bits of positive // range, plus allow an extra one in case we find a later insn that matches // with Offset-1) @@ -1582,6 +1578,10 @@ bool AArch64LoadStoreOpt::tryToMergeLdStInst( if (!isCandidateToMergeOrPair(MI)) return false; + // For narrow stores, find only the case where the stored value is WZR. + if (isNarrowStore(MI) && getLdStRegOp(MI).getReg() != AArch64::WZR) + return false; + // Look ahead up to LdStLimit instructions for a mergable instruction. LdStPairFlags Flags; MachineBasicBlock::iterator MergeMI = findMatchingInsn(MBBI, Flags, LdStLimit); |
