diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/shift-double-x86_64.ll | 10 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/shift-double.ll | 24 |
3 files changed, 15 insertions, 25 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index de666798b03..fe2fd090e21 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -37425,6 +37425,12 @@ static SDValue combineOr(SDNode *N, SelectionDAG &DAG, SDValue Sum = ShAmt1.getOperand(0); if (auto *SumC = dyn_cast<ConstantSDNode>(Sum)) { SDValue ShAmt1Op1 = ShAmt1.getOperand(1); + if (ShAmt1Op1.getOpcode() == ISD::AND && + isa<ConstantSDNode>(ShAmt1Op1.getOperand(1)) && + ShAmt1Op1.getConstantOperandVal(1) == (Bits - 1)) { + ShMsk1 = ShAmt1Op1; + ShAmt1Op1 = ShAmt1Op1.getOperand(0); + } if (ShAmt1Op1.getOpcode() == ISD::TRUNCATE) ShAmt1Op1 = ShAmt1Op1.getOperand(0); if ((SumC->getAPIntValue() == Bits || diff --git a/llvm/test/CodeGen/X86/shift-double-x86_64.ll b/llvm/test/CodeGen/X86/shift-double-x86_64.ll index 22993cd09df..a410595e03c 100644 --- a/llvm/test/CodeGen/X86/shift-double-x86_64.ll +++ b/llvm/test/CodeGen/X86/shift-double-x86_64.ll @@ -118,14 +118,10 @@ define i64 @test7(i64 %hi, i64 %lo, i64 %bits) nounwind { define i64 @test8(i64 %hi, i64 %lo, i64 %bits) nounwind { ; CHECK-LABEL: test8: ; CHECK: # %bb.0: +; CHECK-NEXT: movq %rdx, %rcx ; CHECK-NEXT: movq %rdi, %rax -; CHECK-NEXT: movl %edx, %ecx -; CHECK-NEXT: andb $63, %cl -; CHECK-NEXT: negb %cl -; CHECK-NEXT: shrq %cl, %rsi -; CHECK-NEXT: movl %edx, %ecx -; CHECK-NEXT: shlq %cl, %rax -; CHECK-NEXT: orq %rsi, %rax +; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx +; CHECK-NEXT: shldq %cl, %rsi, %rax ; CHECK-NEXT: retq %tbits = trunc i64 %bits to i8 %tand = and i8 %tbits, 63 diff --git a/llvm/test/CodeGen/X86/shift-double.ll b/llvm/test/CodeGen/X86/shift-double.ll index 70d323957d2..9621c944593 100644 --- a/llvm/test/CodeGen/X86/shift-double.ll +++ b/llvm/test/CodeGen/X86/shift-double.ll @@ -462,30 +462,18 @@ define i32 @test17(i32 %hi, i32 %lo, i32 %bits) nounwind { define i32 @test18(i32 %hi, i32 %lo, i32 %bits) nounwind { ; X86-LABEL: test18: ; X86: # %bb.0: -; X86-NEXT: pushl %esi +; X86-NEXT: movb {{[0-9]+}}(%esp), %cl +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl {{[0-9]+}}(%esp), %esi -; X86-NEXT: movb {{[0-9]+}}(%esp), %dl -; X86-NEXT: movl %edx, %ecx -; X86-NEXT: andb $31, %cl -; X86-NEXT: negb %cl -; X86-NEXT: shrl %cl, %esi -; X86-NEXT: movl %edx, %ecx -; X86-NEXT: shll %cl, %eax -; X86-NEXT: orl %esi, %eax -; X86-NEXT: popl %esi +; X86-NEXT: shldl %cl, %edx, %eax ; X86-NEXT: retl ; ; X64-LABEL: test18: ; X64: # %bb.0: -; X64-NEXT: movl %edi, %eax -; X64-NEXT: movl %edx, %ecx -; X64-NEXT: andb $31, %cl -; X64-NEXT: negb %cl -; X64-NEXT: shrl %cl, %esi ; X64-NEXT: movl %edx, %ecx -; X64-NEXT: shll %cl, %eax -; X64-NEXT: orl %esi, %eax +; X64-NEXT: movl %edi, %eax +; X64-NEXT: # kill: def $cl killed $cl killed $ecx +; X64-NEXT: shldl %cl, %esi, %eax ; X64-NEXT: retq %tbits = trunc i32 %bits to i8 %tand = and i8 %tbits, 31 |
