diff options
| -rw-r--r-- | clang/test/CodeGen/a15.c | 1 | ||||
| -rw-r--r-- | clang/test/CodeGen/builtins-nvptx.c | 1 | ||||
| -rw-r--r-- | clang/test/CodeGen/mips-clobber-reg.c | 1 | ||||
| -rw-r--r-- | clang/test/CodeGen/nvptx-cc.c | 1 | ||||
| -rw-r--r-- | clang/test/CodeGen/parameter-passing.c | 2 | ||||
| -rw-r--r-- | clang/test/CodeGenObjC/bitfield-access.m | 2 | ||||
| -rw-r--r-- | clang/test/CodeGenObjC/metadata_symbols.m | 2 | ||||
| -rw-r--r-- | clang/test/Coverage/targets.c | 2 |
8 files changed, 0 insertions, 12 deletions
diff --git a/clang/test/CodeGen/a15.c b/clang/test/CodeGen/a15.c index 3147c198611..115b1091da3 100644 --- a/clang/test/CodeGen/a15.c +++ b/clang/test/CodeGen/a15.c @@ -1,5 +1,4 @@ // RUN: %clang -ccc-host-triple armv7-none-linux-gnueabi -mcpu=cortex-a15 -emit-llvm -S %s -o /dev/null -// REQUIRES: arm-registered-target int main() { return 0; diff --git a/clang/test/CodeGen/builtins-nvptx.c b/clang/test/CodeGen/builtins-nvptx.c index 90d52ecac7f..fa6b14c1ca7 100644 --- a/clang/test/CodeGen/builtins-nvptx.c +++ b/clang/test/CodeGen/builtins-nvptx.c @@ -1,6 +1,5 @@ // RUN: %clang_cc1 -triple nvptx-unknown-unknown -emit-llvm -o %t %s // RUN: %clang_cc1 -triple nvptx64-unknown-unknown -emit-llvm -o %t %s -// REQUIRES: nvptx-registered-target,nvptx64-registered-target int read_tid() { diff --git a/clang/test/CodeGen/mips-clobber-reg.c b/clang/test/CodeGen/mips-clobber-reg.c index 50f452cbb4d..be18353af82 100644 --- a/clang/test/CodeGen/mips-clobber-reg.c +++ b/clang/test/CodeGen/mips-clobber-reg.c @@ -1,5 +1,4 @@ // RUN: %clang -target mipsel-unknown-linux -S -o - -emit-llvm %s -// REQUIRES: mips-registered-target /* This checks that the frontend will accept both diff --git a/clang/test/CodeGen/nvptx-cc.c b/clang/test/CodeGen/nvptx-cc.c index 0313f28cbe0..1c0d943f956 100644 --- a/clang/test/CodeGen/nvptx-cc.c +++ b/clang/test/CodeGen/nvptx-cc.c @@ -1,6 +1,5 @@ // RUN: %clang_cc1 -triple nvptx-unknown-unknown -O3 -S -o %t %s -emit-llvm // RUN: %clang_cc1 -triple nvptx64-unknown-unknown -O3 -S -o %t %s -emit-llvm -// REQUIRES: nvptx-registered-target,nvptx64-registered-target // Just make sure Clang uses the proper calling convention for the NVPTX back-end. // If something is wrong, the back-end will fail. diff --git a/clang/test/CodeGen/parameter-passing.c b/clang/test/CodeGen/parameter-passing.c index 95a07f5258f..e48815b9661 100644 --- a/clang/test/CodeGen/parameter-passing.c +++ b/clang/test/CodeGen/parameter-passing.c @@ -14,8 +14,6 @@ // RUN: %clang_cc1 %s -triple powerpc-unknown-unknown -O3 -emit-llvm -o %t // RUN: not grep '@g0' %t -// REQUIRES: ppc32-registered-target,x86-registered-target,x86-64-registered-target - typedef _Bool BoolTy; typedef int ScalarTy; typedef _Complex int ComplexTy; diff --git a/clang/test/CodeGenObjC/bitfield-access.m b/clang/test/CodeGenObjC/bitfield-access.m index ea4206cab71..6d4c82a9b17 100644 --- a/clang/test/CodeGenObjC/bitfield-access.m +++ b/clang/test/CodeGenObjC/bitfield-access.m @@ -4,8 +4,6 @@ // RUN: %clang_cc1 -triple armv6-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -target-abi apcs-gnu -emit-llvm -o %t2 %s // RUN: FileCheck -check-prefix=CHECK-ARM < %t2 %s -// REQUIRES: arm-registered-target,x86-registered-target - @interface I0 { @public unsigned x:15; diff --git a/clang/test/CodeGenObjC/metadata_symbols.m b/clang/test/CodeGenObjC/metadata_symbols.m index 024a43f0217..576a55b1369 100644 --- a/clang/test/CodeGenObjC/metadata_symbols.m +++ b/clang/test/CodeGenObjC/metadata_symbols.m @@ -36,8 +36,6 @@ // CHECK-ARMV6: define internal void @"\01-[A im0]" // CHECK-ARMV6: define internal void @"\01-[A(Cat) im1]" -// REQUIRES: arm-registered-target,x86-64-registered-target - @interface A @end diff --git a/clang/test/Coverage/targets.c b/clang/test/Coverage/targets.c index 5421df45066..14b895ea151 100644 --- a/clang/test/Coverage/targets.c +++ b/clang/test/Coverage/targets.c @@ -17,5 +17,3 @@ // <rdar://problem/7181838> clang 1.0 fails to compile Python 2.6 // RUN: %clang -target x86_64-apple-darwin9 -### -S %s -mmacosx-version-min=10.4 - -// REQUIRES: arm-registered-target,mips-registered-target,ppc32-registered-target,ppc64-registered-target,sparc-registered-target,x86-registered-target,x86-64-registered-target |
