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-rw-r--r--llvm/lib/Analysis/IVDescriptors.cpp7
-rw-r--r--llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll30
2 files changed, 37 insertions, 0 deletions
diff --git a/llvm/lib/Analysis/IVDescriptors.cpp b/llvm/lib/Analysis/IVDescriptors.cpp
index ce99226087f..3c33aa973cd 100644
--- a/llvm/lib/Analysis/IVDescriptors.cpp
+++ b/llvm/lib/Analysis/IVDescriptors.cpp
@@ -721,6 +721,13 @@ bool RecurrenceDescriptor::isFirstOrderRecurrence(
if (I->getParent()->getTerminator() == I)
return false;
+ // Do not try to sink an instruction multiple times (if multiple operands
+ // are first order recurrences).
+ // TODO: We can support this case, by sinking the instruction after the
+ // 'deepest' previous instruction.
+ if (SinkAfter.find(I) != SinkAfter.end())
+ return false;
+
if (DT->dominates(Previous, I)) // We already are good w/o sinking.
return true;
diff --git a/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll b/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
index e09804276ec..aa913172f7b 100644
--- a/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
+++ b/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
@@ -243,3 +243,33 @@ for:
exit:
ret void
}
+
+; TODO: We should be able to sink %tmp38 after %tmp60.
+define void @instruction_with_2_FOR_operands() {
+; CHECK-LABEL: define void @instruction_with_2_FOR_operands(
+; CHECK-NEXT: bb:
+; CHECK-NEXT: br label %bb13
+
+; CHECK-LABEL: bb13:
+; CHECK: br i1 %tmp12, label %bb13, label %bb74
+
+; CHECK-LABEL: bb74:
+; CHECK-NEXT: ret void
+;
+bb:
+ br label %bb13
+
+bb13: ; preds = %bb13, %bb
+ %tmp37 = phi float [ %tmp60, %bb13 ], [ undef, %bb ]
+ %tmp27 = phi float [ %tmp49, %bb13 ], [ undef, %bb ]
+ %indvars.iv = phi i64 [ %indvars.iv.next, %bb13 ], [ 0, %bb ]
+ %tmp38 = fmul fast float %tmp37, %tmp27
+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+ %tmp49 = load float, float* undef, align 4
+ %tmp60 = load float, float* undef, align 4
+ %tmp12 = icmp slt i64 %indvars.iv, undef
+ br i1 %tmp12, label %bb13, label %bb74
+
+bb74: ; preds = %bb13
+ ret void
+}
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