diff options
4 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp index a11e396217a..07a35defca7 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp @@ -169,6 +169,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx, case AArch64::fixup_aarch64_ldr_pcrel_imm19: if (SymLoc == AArch64MCExpr::VK_GOTTPREL) return R_CLS(TLSIE_LD_GOTTPREL_PREL19); + if (SymLoc == AArch64MCExpr::VK_GOT) + return R_CLS(GOT_LD_PREL19); return R_CLS(LD_PREL_LO19); case AArch64::fixup_aarch64_pcrel_branch14: return R_CLS(TSTBR14); diff --git a/llvm/test/MC/AArch64/arm64-elf-relocs.s b/llvm/test/MC/AArch64/arm64-elf-relocs.s index 7187c258ec6..62ebb635486 100644 --- a/llvm/test/MC/AArch64/arm64-elf-relocs.s +++ b/llvm/test/MC/AArch64/arm64-elf-relocs.s @@ -269,3 +269,10 @@ trickQuestion: // certainly be accepted when assembling. add x3, x5, :lo12:imm // CHECK: add x3, x5, :lo12:imm + + ldr x24, #:got:sym + ldr d22, :got:sym +// CHECK: ldr x24, :got:sym +// CHECK: ldr d22, :got:sym +// CHECK-OBJ-LP64: R_AARCH64_GOT_LD_PREL19 sym +// CHECK-OBJ-LP64: R_AARCH64_GOT_LD_PREL19 sym
\ No newline at end of file diff --git a/llvm/test/MC/AArch64/elf-reloc-pcreladdressing.s b/llvm/test/MC/AArch64/elf-reloc-pcreladdressing.s index 30acb6d664b..3931d543aad 100644 --- a/llvm/test/MC/AArch64/elf-reloc-pcreladdressing.s +++ b/llvm/test/MC/AArch64/elf-reloc-pcreladdressing.s @@ -7,11 +7,14 @@ adrp x5, :got:some_label ldr x0, [x5, #:got_lo12:some_label] + ldr x0, :got:some_label + // OBJ: Relocations [ // OBJ-NEXT: Section {{.*}} .rela.text { // OBJ-NEXT: 0x0 R_AARCH64_ADR_PREL_LO21 some_label 0x0 // OBJ-NEXT: 0x4 R_AARCH64_ADR_PREL_PG_HI21 some_label 0x0 // OBJ-NEXT: 0x8 R_AARCH64_ADR_GOT_PAGE some_label 0x0 // OBJ-NEXT: 0xC R_AARCH64_LD64_GOT_LO12_NC some_label 0x0 +// OBJ-NEXT: 0x10 R_AARCH64_GOT_LD_PREL19 some_label 0x0 // OBJ-NEXT: } // OBJ-NEXT: ] diff --git a/llvm/test/MC/AArch64/inline-asm-modifiers.s b/llvm/test/MC/AArch64/inline-asm-modifiers.s index 71c9379e375..40b03579bfa 100644 --- a/llvm/test/MC/AArch64/inline-asm-modifiers.s +++ b/llvm/test/MC/AArch64/inline-asm-modifiers.s @@ -68,6 +68,9 @@ test_inline_modifier_A: // @test_inline_modifier_A //APP adrp x0, :gottprel:var_tlsie //NO_APP + //APP + ldr x0, :got:var_got + //NO_APP ret .Ltmp2: .size test_inline_modifier_A, .Ltmp2-test_inline_modifier_A @@ -75,6 +78,7 @@ test_inline_modifier_A: // @test_inline_modifier_A // CHECK: R_AARCH64_ADR_GOT_PAGE var_got // CHECK: R_AARCH64_TLSDESC_ADR_PAGE21 var_tlsgd // CHECK: R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 var_tlsie +// CHECK: R_AARCH64_GOT_LD_PREL19 var_got .globl test_inline_modifier_wx .type test_inline_modifier_wx,@function |
