diff options
| -rw-r--r-- | llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 10 | ||||
| -rw-r--r-- | llvm/test/Transforms/SimplifyCFG/PR29163.ll | 31 |
2 files changed, 39 insertions, 2 deletions
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp index d11f4e85c3d..59f416ebf0f 100644 --- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp +++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp @@ -2110,14 +2110,20 @@ static bool FoldTwoEntryPHINode(PHINode *PN, const TargetTransformInfo &TTI, // Move all 'aggressive' instructions, which are defined in the // conditional parts of the if's up to the dominating block. - if (IfBlock1) + if (IfBlock1) { + for (auto &I : *IfBlock1) + I.dropUnknownNonDebugMetadata(); DomBlock->getInstList().splice(InsertPt->getIterator(), IfBlock1->getInstList(), IfBlock1->begin(), IfBlock1->getTerminator()->getIterator()); - if (IfBlock2) + } + if (IfBlock2) { + for (auto &I : *IfBlock2) + I.dropUnknownNonDebugMetadata(); DomBlock->getInstList().splice(InsertPt->getIterator(), IfBlock2->getInstList(), IfBlock2->begin(), IfBlock2->getTerminator()->getIterator()); + } while (PHINode *PN = dyn_cast<PHINode>(BB->begin())) { // Change the PHI node into a select instruction. diff --git a/llvm/test/Transforms/SimplifyCFG/PR29163.ll b/llvm/test/Transforms/SimplifyCFG/PR29163.ll new file mode 100644 index 00000000000..65f9090dd13 --- /dev/null +++ b/llvm/test/Transforms/SimplifyCFG/PR29163.ll @@ -0,0 +1,31 @@ +; RUN: opt -S -simplifycfg < %s | FileCheck %s +target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +@GV = external constant i64* + +define i64* @test1(i1 %cond, i8* %P) { +entry: + br i1 %cond, label %if, label %then + +then: + %bc = bitcast i8* %P to i64* + br label %join + +if: + %load = load i64*, i64** @GV, align 8, !dereferenceable !0 + br label %join + +join: + %phi = phi i64* [ %bc, %then ], [ %load, %if ] + ret i64* %phi +} + +; CHECK-LABEL: define i64* @test1( +; CHECK: %[[bc:.*]] = bitcast i8* %P to i64* +; CHECK: %[[load:.*]] = load i64*, i64** @GV, align 8{{$}} +; CHECK: %[[phi:.*]] = select i1 %cond, i64* %[[load]], i64* %[[bc]] +; CHECK: ret i64* %[[phi]] + + +!0 = !{i64 8} |
