diff options
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 11 | 
1 files changed, 10 insertions, 1 deletions
| diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index f7643b84073..99de51bf77d 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -877,7 +877,16 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {        return SDOperand(); // ret void is legal      case 2: {        MVT::ValueType ArgVT = Op.getOperand(1).getValueType(); -      unsigned ArgReg = MVT::isInteger(ArgVT) ? PPC::R3 : PPC::F1; +      unsigned ArgReg; +      if (MVT::isVector(ArgVT)) +        ArgReg = PPC::V2; +      else if (MVT::isInteger(ArgVT)) +        ArgReg = PPC::R3; +      else { +        assert(MVT::isFloatingPoint(ArgVT)); +        ArgReg = PPC::F1; +      } +              Copy = DAG.getCopyToReg(Op.getOperand(0), ArgReg, Op.getOperand(1),                                SDOperand()); | 

