diff options
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreInstrInfo.td | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/XCore/constants.ll | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/XCore/zext.ll | 10 |
4 files changed, 20 insertions, 2 deletions
diff --git a/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp b/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp index 768cba6dee0..e28f84fec2a 100644 --- a/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp +++ b/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp @@ -115,7 +115,7 @@ SDNode *XCoreDAGToDAGISel::Select(SDNode *N) { if (immMskBitp(N)) { // Transformation function: get the size of a mask // Look for the first non-zero bit - SDValue MskSize = getI32Imm(32 - countLeadingZeros(Val)); + SDValue MskSize = getI32Imm(32 - countLeadingZeros((uint32_t)Val)); return CurDAG->getMachineNode(XCore::MKMSK_rus, dl, MVT::i32, MskSize); } diff --git a/llvm/lib/Target/XCore/XCoreInstrInfo.td b/llvm/lib/Target/XCore/XCoreInstrInfo.td index e06419ac188..be152aee928 100644 --- a/llvm/lib/Target/XCore/XCoreInstrInfo.td +++ b/llvm/lib/Target/XCore/XCoreInstrInfo.td @@ -84,7 +84,7 @@ def msksize_xform : SDNodeXForm<imm, [{ // Transformation function: get the size of a mask assert(isMask_32(N->getZExtValue())); // look for the first non-zero bit - return getI32Imm(32 - countLeadingZeros(N->getZExtValue())); + return getI32Imm(32 - countLeadingZeros((uint32_t)N->getZExtValue())); }]>; def neg_xform : SDNodeXForm<imm, [{ diff --git a/llvm/test/CodeGen/XCore/constants.ll b/llvm/test/CodeGen/XCore/constants.ll index cad1a2153f4..1e064f37bac 100644 --- a/llvm/test/CodeGen/XCore/constants.ll +++ b/llvm/test/CodeGen/XCore/constants.ll @@ -9,3 +9,11 @@ define i32 @f() { entry: ret i32 12345678 } + +define i32 @g() { +entry: +; CHECK: g: +; CHECK: mkmsk r0, 1 +; CHECK: retsp 0 + ret i32 1; +} diff --git a/llvm/test/CodeGen/XCore/zext.ll b/llvm/test/CodeGen/XCore/zext.ll new file mode 100644 index 00000000000..32abfcaed10 --- /dev/null +++ b/llvm/test/CodeGen/XCore/zext.ll @@ -0,0 +1,10 @@ +; RUN: llc -march=xcore < %s | FileCheck %s + +define i32 @f(i1 %a) { +entry: +; CHECK: f +; CHECK: zext r0, 1 +; CHECK: retsp 0 + %b= zext i1 %a to i32 + ret i32 %b +} |
