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-rw-r--r--llvm/lib/Target/X86/X86CallingConv.td14
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp6
-rw-r--r--llvm/test/CodeGen/X86/avx512-intel-ocl.ll2
-rw-r--r--llvm/test/CodeGen/X86/h-registers-0.ll3
-rw-r--r--llvm/test/CodeGen/X86/test-shrink.ll4
-rw-r--r--llvm/test/CodeGen/X86/vec_cast.ll8
-rw-r--r--llvm/test/CodeGen/X86/win32-bool.ll33
-rw-r--r--llvm/test/CodeGen/X86/win64-bool.ll23
-rw-r--r--llvm/test/CodeGen/X86/xor.ll5
9 files changed, 91 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86CallingConv.td b/llvm/lib/Target/X86/X86CallingConv.td
index 8d3e33d5703..5b7dd024dc4 100644
--- a/llvm/lib/Target/X86/X86CallingConv.td
+++ b/llvm/lib/Target/X86/X86CallingConv.td
@@ -593,8 +593,8 @@ def CC_X86_Win64_C : CallingConv<[
// FIXME: Handle byval stuff.
// FIXME: Handle varargs.
- // Promote i1/i8/i16/v1i1 arguments to i32.
- CCIfType<[i1, i8, i16, v1i1], CCPromoteToType<i32>>,
+ // Promote i1/i8/i16/v1i1 arguments to i8.
+ CCIfType<[i1, v1i1], CCPromoteToType<i8>>,
// The 'nest' parameter, if any, is passed in R10.
CCIfNest<CCAssignToReg<[R10]>>,
@@ -619,6 +619,10 @@ def CC_X86_Win64_C : CallingConv<[
CCIfType<[x86mmx], CCBitConvertToType<i64>>,
// The first 4 integer arguments are passed in integer registers.
+ CCIfType<[i8 ], CCAssignToRegWithShadow<[CL , DL , R8B , R9B ],
+ [XMM0, XMM1, XMM2, XMM3]>>,
+ CCIfType<[i16], CCAssignToRegWithShadow<[CX , DX , R8W , R9W ],
+ [XMM0, XMM1, XMM2, XMM3]>>,
CCIfType<[i32], CCAssignToRegWithShadow<[ECX , EDX , R8D , R9D ],
[XMM0, XMM1, XMM2, XMM3]>>,
@@ -847,13 +851,15 @@ def CC_X86_32_MCU : CallingConv<[
]>;
def CC_X86_32_FastCall : CallingConv<[
- // Promote i1/i8/i16/v1i1 arguments to i32.
- CCIfType<[i1, i8, i16, v1i1], CCPromoteToType<i32>>,
+ // Promote i1 to i8.
+ CCIfType<[i1], CCPromoteToType<i8>>,
// The 'nest' parameter, if any, is passed in EAX.
CCIfNest<CCAssignToReg<[EAX]>>,
// The first 2 integer arguments are passed in ECX/EDX
+ CCIfInReg<CCIfType<[ i8], CCAssignToReg<[ CL, DL]>>>,
+ CCIfInReg<CCIfType<[i16], CCAssignToReg<[ CX, DX]>>>,
CCIfInReg<CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>>,
// Otherwise, same as everything else.
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 69ca1b8bca5..483cba3d314 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -3034,7 +3034,11 @@ SDValue X86TargetLowering::LowerFormalArguments(
getv64i1Argument(VA, ArgLocs[++I], Chain, DAG, dl, Subtarget);
} else {
const TargetRegisterClass *RC;
- if (RegVT == MVT::i32)
+ if (RegVT == MVT::i8)
+ RC = &X86::GR8RegClass;
+ else if (RegVT == MVT::i16)
+ RC = &X86::GR16RegClass;
+ else if (RegVT == MVT::i32)
RC = &X86::GR32RegClass;
else if (Is64Bit && RegVT == MVT::i64)
RC = &X86::GR64RegClass;
diff --git a/llvm/test/CodeGen/X86/avx512-intel-ocl.ll b/llvm/test/CodeGen/X86/avx512-intel-ocl.ll
index 61718fb8c04..defedd2a7f6 100644
--- a/llvm/test/CodeGen/X86/avx512-intel-ocl.ll
+++ b/llvm/test/CodeGen/X86/avx512-intel-ocl.ll
@@ -420,6 +420,7 @@ define <16 x float> @testf16_inp_mask(<16 x float> %a, i16 %mask) {
; WIN64-KNL-NEXT: subq $40, %rsp
; WIN64-KNL-NEXT: .seh_stackalloc 40
; WIN64-KNL-NEXT: .seh_endprologue
+; WIN64-KNL-NEXT: # kill: def $dx killed $dx def $edx
; WIN64-KNL-NEXT: vmovaps (%rcx), %zmm0
; WIN64-KNL-NEXT: kmovw %edx, %k1
; WIN64-KNL-NEXT: callq func_float16_mask
@@ -435,6 +436,7 @@ define <16 x float> @testf16_inp_mask(<16 x float> %a, i16 %mask) {
; WIN64-SKX-NEXT: subq $40, %rsp
; WIN64-SKX-NEXT: .seh_stackalloc 40
; WIN64-SKX-NEXT: .seh_endprologue
+; WIN64-SKX-NEXT: # kill: def $dx killed $dx def $edx
; WIN64-SKX-NEXT: vmovaps (%rcx), %zmm0
; WIN64-SKX-NEXT: kmovd %edx, %k1
; WIN64-SKX-NEXT: callq func_float16_mask
diff --git a/llvm/test/CodeGen/X86/h-registers-0.ll b/llvm/test/CodeGen/X86/h-registers-0.ll
index 5f459c3c459..dfd79f39b6e 100644
--- a/llvm/test/CodeGen/X86/h-registers-0.ll
+++ b/llvm/test/CodeGen/X86/h-registers-0.ll
@@ -98,7 +98,8 @@ define i16 @qux16(i16 inreg %x) nounwind {
; X86-64: movzbl %ah, %eax
; WIN64-LABEL: qux16:
-; WIN64: movzbl %ch, %eax
+; WIN64: movzwl %cx, %eax
+; WIN64: shrl $8, %eax
; X86-32-LABEL: qux16:
; X86-32: movzbl %ah, %eax
diff --git a/llvm/test/CodeGen/X86/test-shrink.ll b/llvm/test/CodeGen/X86/test-shrink.ll
index e44233fdd94..5a5981462a5 100644
--- a/llvm/test/CodeGen/X86/test-shrink.ll
+++ b/llvm/test/CodeGen/X86/test-shrink.ll
@@ -186,6 +186,7 @@ define void @g16xh(i16 inreg %x) nounwind {
; CHECK-WIN32-64-LABEL: g16xh:
; CHECK-WIN32-64: # %bb.0:
; CHECK-WIN32-64-NEXT: subq $40, %rsp
+; CHECK-WIN32-64-NEXT: # kill: def $cx killed $cx def $ecx
; CHECK-WIN32-64-NEXT: testl $2048, %ecx # imm = 0x800
; CHECK-WIN32-64-NEXT: jne .LBB4_2
; CHECK-WIN32-64-NEXT: # %bb.1: # %yes
@@ -228,6 +229,7 @@ define void @g16xl(i16 inreg %x) nounwind {
; CHECK-WIN32-64-LABEL: g16xl:
; CHECK-WIN32-64: # %bb.0:
; CHECK-WIN32-64-NEXT: subq $40, %rsp
+; CHECK-WIN32-64-NEXT: # kill: def $cx killed $cx def $ecx
; CHECK-WIN32-64-NEXT: testb $8, %cl
; CHECK-WIN32-64-NEXT: jne .LBB5_2
; CHECK-WIN32-64-NEXT: # %bb.1: # %yes
@@ -497,6 +499,7 @@ define void @truncand32(i16 inreg %x) nounwind {
; CHECK-WIN32-64-LABEL: truncand32:
; CHECK-WIN32-64: # %bb.0:
; CHECK-WIN32-64-NEXT: subq $40, %rsp
+; CHECK-WIN32-64-NEXT: # kill: def $cx killed $cx def $ecx
; CHECK-WIN32-64-NEXT: testl $2049, %ecx # imm = 0x801
; CHECK-WIN32-64-NEXT: je .LBB11_1
; CHECK-WIN32-64-NEXT: # %bb.2: # %no
@@ -543,6 +546,7 @@ define void @testw(i16 inreg %x) nounwind minsize {
; CHECK-WIN32-64-LABEL: testw:
; CHECK-WIN32-64: # %bb.0:
; CHECK-WIN32-64-NEXT: subq $40, %rsp
+; CHECK-WIN32-64-NEXT: # kill: def $cx killed $cx def $ecx
; CHECK-WIN32-64-NEXT: testw $2049, %cx # imm = 0x801
; CHECK-WIN32-64-NEXT: jne .LBB12_2
; CHECK-WIN32-64-NEXT: # %bb.1: # %yes
diff --git a/llvm/test/CodeGen/X86/vec_cast.ll b/llvm/test/CodeGen/X86/vec_cast.ll
index e6e59829e00..f6b1ac14490 100644
--- a/llvm/test/CodeGen/X86/vec_cast.ll
+++ b/llvm/test/CodeGen/X86/vec_cast.ll
@@ -37,6 +37,9 @@ define <3 x i32> @b(<3 x i16> %a) nounwind {
;
; CHECK-WIN-LABEL: b:
; CHECK-WIN: # %bb.0:
+; CHECK-WIN-NEXT: # kill: def $r8w killed $r8w def $r8d
+; CHECK-WIN-NEXT: # kill: def $dx killed $dx def $edx
+; CHECK-WIN-NEXT: # kill: def $cx killed $cx def $ecx
; CHECK-WIN-NEXT: movd %ecx, %xmm0
; CHECK-WIN-NEXT: pinsrw $1, %edx, %xmm0
; CHECK-WIN-NEXT: pinsrw $2, %r8d, %xmm0
@@ -58,6 +61,7 @@ define <1 x i32> @c(<1 x i16> %a) nounwind {
;
; CHECK-WIN-LABEL: c:
; CHECK-WIN: # %bb.0:
+; CHECK-WIN-NEXT: # kill: def $cx killed $cx def $ecx
; CHECK-WIN-NEXT: movd %ecx, %xmm0
; CHECK-WIN-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,1,4,5,6,7]
; CHECK-WIN-NEXT: psrad $16, %xmm0
@@ -100,6 +104,9 @@ define <3 x i32> @e(<3 x i16> %a) nounwind {
;
; CHECK-WIN-LABEL: e:
; CHECK-WIN: # %bb.0:
+; CHECK-WIN-NEXT: # kill: def $r8w killed $r8w def $r8d
+; CHECK-WIN-NEXT: # kill: def $dx killed $dx def $edx
+; CHECK-WIN-NEXT: # kill: def $cx killed $cx def $ecx
; CHECK-WIN-NEXT: movd %ecx, %xmm0
; CHECK-WIN-NEXT: pinsrw $1, %edx, %xmm0
; CHECK-WIN-NEXT: pinsrw $2, %r8d, %xmm0
@@ -121,6 +128,7 @@ define <1 x i32> @f(<1 x i16> %a) nounwind {
;
; CHECK-WIN-LABEL: f:
; CHECK-WIN: # %bb.0:
+; CHECK-WIN-NEXT: # kill: def $cx killed $cx def $ecx
; CHECK-WIN-NEXT: movd %ecx, %xmm0
; CHECK-WIN-NEXT: pxor %xmm1, %xmm1
; CHECK-WIN-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
diff --git a/llvm/test/CodeGen/X86/win32-bool.ll b/llvm/test/CodeGen/X86/win32-bool.ll
new file mode 100644
index 00000000000..53607ea06c7
--- /dev/null
+++ b/llvm/test/CodeGen/X86/win32-bool.ll
@@ -0,0 +1,33 @@
+; RUN: llc < %s -mtriple=i686-windows-msvc | FileCheck %s
+; RUN: llc < %s -mtriple=i686-windows-gnu | FileCheck %s
+
+define x86_fastcallcc i32 @pass_fast_bool(i1 inreg zeroext %b) {
+entry:
+ %cond = select i1 %b, i32 66, i32 0
+ ret i32 %cond
+}
+
+; CHECK-LABEL: @pass_fast_bool@4:
+; CHECK-DAG: testb %cl, %cl
+; CHECK-DAG: movl $66,
+; CHECK: retl
+
+define x86_vectorcallcc i32 @pass_vector_bool(i1 inreg zeroext %b) {
+entry:
+ %cond = select i1 %b, i32 66, i32 0
+ ret i32 %cond
+}
+
+; CHECK-LABEL: pass_vector_bool@@4:
+; CHECK-DAG: testb %cl, %cl
+; CHECK-DAG: movl $66,
+; CHECK: retl
+
+define zeroext i1 @ret_true() {
+entry:
+ ret i1 true
+}
+
+; CHECK-LABEL: ret_true:
+; CHECK: movb $1, %al
+; CHECK: retl
diff --git a/llvm/test/CodeGen/X86/win64-bool.ll b/llvm/test/CodeGen/X86/win64-bool.ll
new file mode 100644
index 00000000000..cb77c7ed201
--- /dev/null
+++ b/llvm/test/CodeGen/X86/win64-bool.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=CHECK
+; RUN: llc < %s -mtriple=x86_64-windows-gnu | FileCheck %s --check-prefix=CHECK
+
+define i32 @pass_bool(i1 zeroext %b) {
+entry:
+ %cond = select i1 %b, i32 66, i32 0
+ ret i32 %cond
+}
+
+; CHECK-LABEL: pass_bool:
+; CHECK-DAG: testb %cl, %cl
+; CHECK-DAG: movl $66,
+; CHECK: cmovel {{.*}}, %eax
+; CHECK: retq
+
+define zeroext i1 @ret_true() {
+entry:
+ ret i1 true
+}
+
+; CHECK-LABEL: ret_true:
+; CHECK: movb $1, %al
+; CHECK: retq
diff --git a/llvm/test/CodeGen/X86/xor.ll b/llvm/test/CodeGen/X86/xor.ll
index 6f0f0df465c..f73fdb21b96 100644
--- a/llvm/test/CodeGen/X86/xor.ll
+++ b/llvm/test/CodeGen/X86/xor.ll
@@ -167,6 +167,8 @@ define i16 @test5(i16 %a, i16 %b) nounwind {
;
; X64-WIN-LABEL: test5:
; X64-WIN: # %bb.0: # %entry
+; X64-WIN-NEXT: # kill: def $dx killed $dx def $edx
+; X64-WIN-NEXT: # kill: def $cx killed $cx def $ecx
; X64-WIN-NEXT: .p2align 4, 0x90
; X64-WIN-NEXT: .LBB4_1: # %bb
; X64-WIN-NEXT: # =>This Inner Loop Header: Depth=1
@@ -427,7 +429,8 @@ define i32 @PR17487(i1 %tobool) {
;
; X64-WIN-LABEL: PR17487:
; X64-WIN: # %bb.0:
-; X64-WIN-NEXT: movd %ecx, %xmm0
+; X64-WIN-NEXT: movzbl %cl, %eax
+; X64-WIN-NEXT: movd %eax, %xmm0
; X64-WIN-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
; X64-WIN-NEXT: pandn __xmm@{{.*}}(%rip), %xmm0
; X64-WIN-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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