diff options
-rw-r--r-- | llvm/tools/llvm-mca/Scheduler.cpp | 16 | ||||
-rw-r--r-- | llvm/tools/llvm-mca/Scheduler.h | 15 |
2 files changed, 16 insertions, 15 deletions
diff --git a/llvm/tools/llvm-mca/Scheduler.cpp b/llvm/tools/llvm-mca/Scheduler.cpp index d799ef07b2a..fb609917005 100644 --- a/llvm/tools/llvm-mca/Scheduler.cpp +++ b/llvm/tools/llvm-mca/Scheduler.cpp @@ -47,8 +47,7 @@ void ResourceState::dump() const { // ResourceDescriptor. Map 'Resources' allows to quickly obtain ResourceState // objects from resource mask identifiers. void ResourceManager::addResource(const MCProcResourceDesc &Desc, - unsigned Index, - uint64_t Mask) { + unsigned Index, uint64_t Mask) { assert(Resources.find(Mask) == Resources.end() && "Resource already added!"); Resources[Mask] = llvm::make_unique<ResourceState>(Desc, Index, Mask); } @@ -147,8 +146,9 @@ void ResourceManager::release(ResourceRef RR) { } } -void ResourceManager::reserveDispatchHazardResources(const InstrDesc &Desc) { - for (const uint64_t R : Desc.Buffers) { +void ResourceManager::reserveDispatchHazardResources( + const ArrayRef<uint64_t> Buffers) { + for (const uint64_t R : Buffers) { ResourceState &Resource = *Resources[R]; if (Resource.isADispatchHazard()) { assert(!Resource.isReserved()); @@ -208,7 +208,7 @@ double ResourceManager::getRThroughput(const InstrDesc &ID) const { void ResourceManager::issueInstruction( unsigned Index, const InstrDesc &Desc, SmallVectorImpl<std::pair<ResourceRef, unsigned>> &Pipes) { - releaseBuffers(Desc); + releaseBuffers(Desc.Buffers); for (const std::pair<uint64_t, ResourceUsage> &R : Desc.Resources) { const CycleSegment &CS = R.second.CS; if (!CS.size()) { @@ -278,12 +278,12 @@ Instruction *Scheduler::scheduleInstruction(unsigned Idx, Instruction *MCIS) { // Consume entries in the reservation stations. const InstrDesc &Desc = MCIS->getDesc(); - Resources->reserveBuffers(Desc); + Resources->reserveBuffers(Desc.Buffers); // Mark units with BufferSize=0 as reserved. These resources will only // be released after MCIS is issued, and all the ResourceCycles for // those units have been consumed. - Resources->reserveDispatchHazardResources(Desc); + Resources->reserveDispatchHazardResources(Desc.Buffers); bool MayLoad = Desc.MayLoad; bool MayStore = Desc.MayStore; @@ -346,7 +346,7 @@ Scheduler::Event Scheduler::canBeDispatched(const InstrDesc &Desc) const { return HWS_ST_QUEUE_UNAVAILABLE; Scheduler::Event Event; - switch (Resources->canBeDispatched(Desc)) { + switch (Resources->canBeDispatched(Desc.Buffers)) { case ResourceStateEvent::RS_BUFFER_AVAILABLE: Event = HWS_AVAILABLE; break; diff --git a/llvm/tools/llvm-mca/Scheduler.h b/llvm/tools/llvm-mca/Scheduler.h index 81daaa72c15..4a3d69e076d 100644 --- a/llvm/tools/llvm-mca/Scheduler.h +++ b/llvm/tools/llvm-mca/Scheduler.h @@ -356,9 +356,10 @@ class ResourceManager { public: ResourceManager(const llvm::MCSchedModel &SM) { initialize(SM); } - ResourceStateEvent canBeDispatched(const InstrDesc &Desc) const { + ResourceStateEvent + canBeDispatched(const llvm::ArrayRef<uint64_t> Buffers) const { ResourceStateEvent Result = ResourceStateEvent::RS_BUFFER_AVAILABLE; - for (uint64_t Buffer : Desc.Buffers) { + for (uint64_t Buffer : Buffers) { Result = isBufferAvailable(Buffer); if (Result != ResourceStateEvent::RS_BUFFER_AVAILABLE) break; @@ -367,13 +368,13 @@ public: return Result; } - void reserveBuffers(const InstrDesc &Desc) { - for (const uint64_t R : Desc.Buffers) + void reserveBuffers(const llvm::ArrayRef<uint64_t> Buffers) { + for (const uint64_t R : Buffers) reserveBuffer(R); } - void releaseBuffers(const InstrDesc &Desc) { - for (const uint64_t R : Desc.Buffers) + void releaseBuffers(const llvm::ArrayRef<uint64_t> Buffers) { + for (const uint64_t R : Buffers) releaseBuffer(R); } @@ -388,7 +389,7 @@ public: Resource.clearReserved(); } - void reserveDispatchHazardResources(const InstrDesc &Desc); + void reserveDispatchHazardResources(const llvm::ArrayRef<uint64_t> Buffers); // Returns true if all resources are in-order, and there is at least one // resource which is a dispatch hazard (BufferSize = 0). |