diff options
| -rw-r--r-- | llvm/lib/Target/Mips/Mips.td | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSubtarget.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/2010-07-20-Select.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/fpcmp.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/mips1f64ldst.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/select.ll | 2 |
6 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/Mips/Mips.td b/llvm/lib/Target/Mips/Mips.td index 433cd57f34e..4087c82d7e6 100644 --- a/llvm/lib/Target/Mips/Mips.td +++ b/llvm/lib/Target/Mips/Mips.td @@ -79,6 +79,7 @@ def : Proc<"r3000", [FeatureMips1]>; def : Proc<"mips2", [FeatureMips2]>; def : Proc<"r6000", [FeatureMips2]>; +def : Proc<"mips32r1", [FeatureMips32]>; def : Proc<"4ke", [FeatureMips32r2]>; // Allegrex is a 32bit subset of r4000, both for integer and fp registers, diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp index c273d0a2cd7..dd115fdecf9 100644 --- a/llvm/lib/Target/Mips/MipsSubtarget.cpp +++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp @@ -31,8 +31,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, { std::string CPUName = CPU; if (CPUName.empty()) - CPUName = "mips1"; - MipsArchVersion = Mips1; + CPUName = "mips32r1"; // Parse features string. ParseSubtargetFeatures(CPUName, FS); diff --git a/llvm/test/CodeGen/Mips/2010-07-20-Select.ll b/llvm/test/CodeGen/Mips/2010-07-20-Select.ll index e5e2c547377..31e56ff27d1 100644 --- a/llvm/test/CodeGen/Mips/2010-07-20-Select.ll +++ b/llvm/test/CodeGen/Mips/2010-07-20-Select.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=mips -relocation-model=static | FileCheck %s -; RUN: llc < %s -march=mips -relocation-model=static -regalloc=basic | FileCheck %s +; RUN: llc < %s -march=mips -relocation-model=static -mcpu=mips1 | FileCheck %s +; RUN: llc < %s -march=mips -relocation-model=static -regalloc=basic -mcpu=mips1 | FileCheck %s ; Fix PR7473 define i32 @main() nounwind readnone { diff --git a/llvm/test/CodeGen/Mips/fpcmp.ll b/llvm/test/CodeGen/Mips/fpcmp.ll index c89ffe67f1b..24de2ffd638 100644 --- a/llvm/test/CodeGen/Mips/fpcmp.ll +++ b/llvm/test/CodeGen/Mips/fpcmp.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=mipsel -mcpu=4ke | FileCheck %s -check-prefix=CHECK-MIPS32R2 -; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-MIPS1 +; RUN: llc < %s -march=mipsel -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-MIPS1 @g1 = external global i32 diff --git a/llvm/test/CodeGen/Mips/mips1f64ldst.ll b/llvm/test/CodeGen/Mips/mips1f64ldst.ll index 1860755634c..28683be7434 100644 --- a/llvm/test/CodeGen/Mips/mips1f64ldst.ll +++ b/llvm/test/CodeGen/Mips/mips1f64ldst.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-EL -; RUN: llc < %s -march=mips | FileCheck %s -check-prefix=CHECK-EB +; RUN: llc < %s -march=mipsel -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-EL +; RUN: llc < %s -march=mips -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-EB @g1 = common global double 0.000000e+00, align 8 @g2 = common global double 0.000000e+00, align 8 diff --git a/llvm/test/CodeGen/Mips/select.ll b/llvm/test/CodeGen/Mips/select.ll index 3ea4c4b2e33..623c2a3e556 100644 --- a/llvm/test/CodeGen/Mips/select.ll +++ b/llvm/test/CodeGen/Mips/select.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=mipsel -mcpu=4ke | FileCheck %s -check-prefix=CHECK-MIPS32R2 -; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-MIPS1 +; RUN: llc < %s -march=mipsel -mcpu=mips1 | FileCheck %s -check-prefix=CHECK-MIPS1 @d2 = external global double @d3 = external global double |
