diff options
-rw-r--r-- | llvm/include/llvm/CodeGen/MIRYamlMapping.h | 45 | ||||
-rw-r--r-- | llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 15 | ||||
-rw-r--r-- | llvm/lib/CodeGen/MIRPrinter.cpp | 22 | ||||
-rw-r--r-- | llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir | 35 | ||||
-rw-r--r-- | llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir | 32 | ||||
-rw-r--r-- | llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir | 32 | ||||
-rw-r--r-- | llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir | 34 |
7 files changed, 213 insertions, 2 deletions
diff --git a/llvm/include/llvm/CodeGen/MIRYamlMapping.h b/llvm/include/llvm/CodeGen/MIRYamlMapping.h index 68a17521064..4a6018d08c9 100644 --- a/llvm/include/llvm/CodeGen/MIRYamlMapping.h +++ b/llvm/include/llvm/CodeGen/MIRYamlMapping.h @@ -129,7 +129,7 @@ template <> struct MappingTraits<MachineBasicBlock> { /// /// TODO: Determine isPreallocated flag by mapping between objects and local /// objects (Serialize local objects). -/// TODO: Serialize variable sized and fixed stack objects. +/// TODO: Serialize variable sized objects. struct MachineStackObject { enum ObjectType { DefaultType, SpillSlot }; // TODO: Serialize LLVM alloca reference. @@ -161,12 +161,53 @@ template <> struct MappingTraits<MachineStackObject> { static const bool flow = true; }; +/// Serializable representation of the fixed stack object from the +/// MachineFrameInfo class. +struct FixedMachineStackObject { + enum ObjectType { DefaultType, SpillSlot }; + unsigned ID; + ObjectType Type = DefaultType; + int64_t Offset = 0; + uint64_t Size = 0; + unsigned Alignment = 0; + bool IsImmutable = false; + bool IsAliased = false; +}; + +template <> +struct ScalarEnumerationTraits<FixedMachineStackObject::ObjectType> { + static void enumeration(yaml::IO &IO, + FixedMachineStackObject::ObjectType &Type) { + IO.enumCase(Type, "default", FixedMachineStackObject::DefaultType); + IO.enumCase(Type, "spill-slot", FixedMachineStackObject::SpillSlot); + } +}; + +template <> struct MappingTraits<FixedMachineStackObject> { + static void mapping(yaml::IO &YamlIO, FixedMachineStackObject &Object) { + YamlIO.mapRequired("id", Object.ID); + YamlIO.mapOptional( + "type", Object.Type, + FixedMachineStackObject::DefaultType); // Don't print the default type. + YamlIO.mapOptional("offset", Object.Offset); + YamlIO.mapOptional("size", Object.Size); + YamlIO.mapOptional("alignment", Object.Alignment); + if (Object.Type != FixedMachineStackObject::SpillSlot) { + YamlIO.mapOptional("isImmutable", Object.IsImmutable); + YamlIO.mapOptional("isAliased", Object.IsAliased); + } + } + + static const bool flow = true; +}; + } // end namespace yaml } // end namespace llvm LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::VirtualRegisterDefinition) LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::MachineBasicBlock) LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::MachineStackObject) +LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::FixedMachineStackObject) namespace llvm { namespace yaml { @@ -230,6 +271,7 @@ struct MachineFunction { // TODO: Serialize live in registers. // Frame information MachineFrameInfo FrameInfo; + std::vector<FixedMachineStackObject> FixedStackObjects; std::vector<MachineStackObject> StackObjects; std::vector<MachineBasicBlock> BasicBlocks; @@ -246,6 +288,7 @@ template <> struct MappingTraits<MachineFunction> { YamlIO.mapOptional("tracksSubRegLiveness", MF.TracksSubRegLiveness); YamlIO.mapOptional("registers", MF.VirtualRegisters); YamlIO.mapOptional("frameInfo", MF.FrameInfo); + YamlIO.mapOptional("fixedStack", MF.FixedStackObjects); YamlIO.mapOptional("stack", MF.StackObjects); YamlIO.mapOptional("body", MF.BasicBlocks); } diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp index 612084c0b8d..ab4a037aba2 100644 --- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp +++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp @@ -376,7 +376,20 @@ bool MIRParserImpl::initializeFrameInfo(MachineFrameInfo &MFI, MFI.setHasVAStart(YamlMFI.HasVAStart); MFI.setHasMustTailInVarArgFunc(YamlMFI.HasMustTailInVarArgFunc); - // Initialize the frame objects. + // Initialize the fixed frame objects. + for (const auto &Object : YamlMF.FixedStackObjects) { + int ObjectIdx; + if (Object.Type != yaml::FixedMachineStackObject::SpillSlot) + ObjectIdx = MFI.CreateFixedObject(Object.Size, Object.Offset, + Object.IsImmutable, Object.IsAliased); + else + ObjectIdx = MFI.CreateFixedSpillStackObject(Object.Size, Object.Offset); + MFI.setObjectAlignment(ObjectIdx, Object.Alignment); + // TODO: Store the mapping between fixed object IDs and object indices to + // parse fixed stack object references correctly. + } + + // Initialize the ordinary frame objects. for (const auto &Object : YamlMF.StackObjects) { int ObjectIdx = MFI.CreateStackObject( Object.Size, Object.Alignment, diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index 2ae3c4491a6..9b3918f09c0 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -157,7 +157,29 @@ void MIRPrinter::convert(yaml::MachineFrameInfo &YamlMFI, void MIRPrinter::convertStackObjects(yaml::MachineFunction &MF, const MachineFrameInfo &MFI) { + // Process fixed stack objects. unsigned ID = 0; + for (int I = MFI.getObjectIndexBegin(); I < 0; ++I) { + if (MFI.isDeadObjectIndex(I)) + continue; + + yaml::FixedMachineStackObject YamlObject; + YamlObject.ID = ID++; + YamlObject.Type = MFI.isSpillSlotObjectIndex(I) + ? yaml::FixedMachineStackObject::SpillSlot + : yaml::FixedMachineStackObject::DefaultType; + YamlObject.Offset = MFI.getObjectOffset(I); + YamlObject.Size = MFI.getObjectSize(I); + YamlObject.Alignment = MFI.getObjectAlignment(I); + YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I); + YamlObject.IsAliased = MFI.isAliasedObjectIndex(I); + MF.FixedStackObjects.push_back(YamlObject); + // TODO: Store the mapping between fixed object IDs and object indices to + // print the fixed stack object references correctly. + } + + // Process ordinary stack objects. + ID = 0; for (int I = 0, E = MFI.getObjectIndexEnd(); I < E; ++I) { if (MFI.isDeadObjectIndex(I)) continue; diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir new file mode 100644 index 00000000000..dcbe6f73a6d --- /dev/null +++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir @@ -0,0 +1,35 @@ +# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# This test ensures that the MIR parser parses fixed stack objects correctly. + +--- | + + define i32 @test(i32 %a) #0 { + entry: + %b = alloca i32 + store i32 %a, i32* %b + %c = load i32, i32* %b + ret i32 %c + } + + attributes #0 = { "no-frame-pointer-elim"="false" } + +... +--- +name: test +frameInfo: + stackSize: 4 + maxAlignment: 4 +# CHECK: fixedStack: +# CHECK-NEXT: - { id: 0, offset: 0, size: 4, alignment: 4, isImmutable: true, isAliased: false } +fixedStack: + - { id: 0, offset: 0, size: 4, alignment: 4, isImmutable: true, isAliased: false } +stack: + - { id: 0, offset: -8, size: 4, alignment: 4 } +body: + - id: 0 + name: entry + instructions: + - '%eax = MOV32rm %esp, 1, _, 8, _' + - 'MOV32mr %esp, 1, _, 0, _, %eax' + - 'RETL %eax' +... diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir new file mode 100644 index 00000000000..67f4bd21cd0 --- /dev/null +++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir @@ -0,0 +1,32 @@ +# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s + +--- | + + define i32 @test(i32 %a) #0 { + entry: + %b = alloca i32 + store i32 %a, i32* %b + %c = load i32, i32* %b + ret i32 %c + } + + attributes #0 = { "no-frame-pointer-elim"="false" } + +... +--- +name: test +frameInfo: + maxAlignment: 4 +fixedStack: + # CHECK: [[@LINE+1]]:63: unknown key 'isAliased' + - { id: 0, type: spill-slot, offset: 0, size: 4, isAliased: true } +stack: + - { id: 0, offset: -12, size: 4, alignment: 4 } +body: + - id: 0 + name: entry + instructions: + - 'MOV32mr %rsp, 1, _, -4, _, %edi' + - '%eax = COPY %edi' + - 'RETQ %eax' +... diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir new file mode 100644 index 00000000000..1e1b0fdcc8d --- /dev/null +++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir @@ -0,0 +1,32 @@ +# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s + +--- | + + define i32 @test(i32 %a) #0 { + entry: + %b = alloca i32 + store i32 %a, i32* %b + %c = load i32, i32* %b + ret i32 %c + } + + attributes #0 = { "no-frame-pointer-elim"="false" } + +... +--- +name: test +frameInfo: + maxAlignment: 4 +fixedStack: + # CHECK: [[@LINE+1]]:65: unknown key 'isImmutable' + - { id: 0, type: spill-slot, offset: 0, size: 4, isImmutable: true } +stack: + - { id: 0, offset: -12, size: 4, alignment: 4 } +body: + - id: 0 + name: entry + instructions: + - 'MOV32mr %rsp, 1, _, -4, _, %edi' + - '%eax = COPY %edi' + - 'RETQ %eax' +... diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir new file mode 100644 index 00000000000..f771f796ec3 --- /dev/null +++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir @@ -0,0 +1,34 @@ +# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# This test ensures that the MIR parser parses fixed stack objects correctly. + +--- | + + define i32 @test(i32 %a) #0 { + entry: + %b = alloca i32 + store i32 %a, i32* %b + %c = load i32, i32* %b + ret i32 %c + } + + attributes #0 = { "no-frame-pointer-elim"="false" } + +... +--- +name: test +frameInfo: + maxAlignment: 4 +# CHECK: fixedStack: +# CHECK-NEXT: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 } +fixedStack: + - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4 } +stack: + - { id: 0, offset: -12, size: 4, alignment: 4 } +body: + - id: 0 + name: entry + instructions: + - 'MOV32mr %rsp, 1, _, -4, _, %edi' + - '%eax = COPY %edi' + - 'RETQ %eax' +... |