diff options
| -rw-r--r-- | llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 2 | ||||
| -rw-r--r-- | llvm/include/llvm/Target/TargetLowering.h | 7 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 |
3 files changed, 2 insertions, 9 deletions
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h index 6acbc3fc3f9..21cf9864d4c 100644 --- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h @@ -56,8 +56,6 @@ struct SDVTList { /// ISD namespace - This namespace contains an enum which represents all of the /// SelectionDAG node types and value types. /// -/// If you add new elements here you should increase OpActionsCapacity in -/// TargetLowering.h by the number of new elements. namespace ISD { //===--------------------------------------------------------------------===// diff --git a/llvm/include/llvm/Target/TargetLowering.h b/llvm/include/llvm/Target/TargetLowering.h index cbcfc53bf34..4a6e1f9344b 100644 --- a/llvm/include/llvm/Target/TargetLowering.h +++ b/llvm/include/llvm/Target/TargetLowering.h @@ -1489,15 +1489,12 @@ private: /// by the system, this holds the same type (e.g. i32 -> i32). MVT TransformToType[MVT::LAST_VALUETYPE]; - // Defines the capacity of the TargetLowering::OpActions table - static const int OpActionsCapacity = 184; - /// OpActions - For each operation and each value type, keep a LegalizeAction /// that indicates how instruction selection should deal with the operation. /// Most operations are Legal (aka, supported natively by the target), but /// operations that are not should be described. Note that operations on /// non-legal value types are not described here. - uint64_t OpActions[OpActionsCapacity]; + uint64_t OpActions[ISD::BUILTIN_OP_END]; /// LoadExtActions - For each load of load extension type and each value type, /// keep a LegalizeAction that indicates how instruction selection should deal @@ -1535,7 +1532,7 @@ private: /// like PerformDAGCombine callbacks for by calling setTargetDAGCombine(), /// which sets a bit in this array. unsigned char - TargetDAGCombineArray[OpActionsCapacity/(sizeof(unsigned char)*8)]; + TargetDAGCombineArray[(ISD::BUILTIN_OP_END+CHAR_BIT-1)/CHAR_BIT]; /// PromoteToType - For operations that must be promoted to a specific type, /// this holds the destination type. This map should be sparse, so don't hold diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 6fcecc872b5..bbd222285e4 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -398,8 +398,6 @@ static void InitCmpLibcallCCs(ISD::CondCode *CCs) { TargetLowering::TargetLowering(TargetMachine &tm) : TM(tm), TD(TM.getTargetData()) { - assert(ISD::BUILTIN_OP_END <= OpActionsCapacity && - "Fixed size array in TargetLowering is not large enough!"); // All operations default to being supported. memset(OpActions, 0, sizeof(OpActions)); memset(LoadExtActions, 0, sizeof(LoadExtActions)); |
