diff options
23 files changed, 92 insertions, 58 deletions
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 82c089e722b..aaa196f8065 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -2133,7 +2133,7 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, Locality = (E->getNumArgs() > 2) ? EmitScalarExpr(E->getArg(2)) : llvm::ConstantInt::get(Int32Ty, 3); Value *Data = llvm::ConstantInt::get(Int32Ty, 1); - Function *F = CGM.getIntrinsic(Intrinsic::prefetch); + Function *F = CGM.getIntrinsic(Intrinsic::prefetch, Address->getType()); return RValue::get(Builder.CreateCall(F, {Address, RW, Locality, Data})); } case Builtin::BI__builtin_readcyclecounter: { @@ -6021,7 +6021,7 @@ Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID, // Locality is not supported on ARM target Value *Locality = llvm::ConstantInt::get(Int32Ty, 3); - Function *F = CGM.getIntrinsic(Intrinsic::prefetch); + Function *F = CGM.getIntrinsic(Intrinsic::prefetch, Address->getType()); return Builder.CreateCall(F, {Address, RW, Locality, IsData}); } @@ -6960,7 +6960,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID, // FIXME: We need AArch64 specific LLVM intrinsic if we want to specify // PLDL3STRM or PLDL2STRM. - Function *F = CGM.getIntrinsic(Intrinsic::prefetch); + Function *F = CGM.getIntrinsic(Intrinsic::prefetch, Address->getType()); return Builder.CreateCall(F, {Address, RW, Locality, IsData}); } @@ -10037,7 +10037,7 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, Value *RW = ConstantInt::get(Int32Ty, (C->getZExtValue() >> 2) & 0x1); Value *Locality = ConstantInt::get(Int32Ty, C->getZExtValue() & 0x3); Value *Data = ConstantInt::get(Int32Ty, 1); - Function *F = CGM.getIntrinsic(Intrinsic::prefetch); + Function *F = CGM.getIntrinsic(Intrinsic::prefetch, Address->getType()); return Builder.CreateCall(F, {Address, RW, Locality, Data}); } case X86::BI_mm_clflush: { diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp index 401bb3c000b..8f5a892b9a2 100644 --- a/clang/lib/Sema/SemaExpr.cpp +++ b/clang/lib/Sema/SemaExpr.cpp @@ -5375,8 +5375,8 @@ static FunctionDecl *rewriteBuiltinFunctionDecl(Sema *Sema, ASTContext &Context, QualType DeclType = FDecl->getType(); const FunctionProtoType *FT = dyn_cast<FunctionProtoType>(DeclType); - if (!Context.BuiltinInfo.hasPtrArgsOrResult(FDecl->getBuiltinID()) || - !FT || FT->isVariadic() || ArgExprs.size() != FT->getNumParams()) + if (!Context.BuiltinInfo.hasPtrArgsOrResult(FDecl->getBuiltinID()) || !FT || + ArgExprs.size() < FT->getNumParams()) return nullptr; bool NeedsNewDecl = false; @@ -5415,6 +5415,7 @@ static FunctionDecl *rewriteBuiltinFunctionDecl(Sema *Sema, ASTContext &Context, return nullptr; FunctionProtoType::ExtProtoInfo EPI; + EPI.Variadic = FT->isVariadic(); QualType OverloadTy = Context.getFunctionType(FT->getReturnType(), OverloadParams, EPI); DeclContext *Parent = FDecl->getParent(); diff --git a/clang/test/CodeGen/arm_acle.c b/clang/test/CodeGen/arm_acle.c index beca9373506..2f086ee70bf 100644 --- a/clang/test/CodeGen/arm_acle.c +++ b/clang/test/CodeGen/arm_acle.c @@ -88,28 +88,28 @@ void test_swp(uint32_t x, volatile void *p) { /* 8.6 Memory prefetch intrinsics */ /* 8.6.1 Data prefetch */ // ARM-LABEL: test_pld -// ARM: call void @llvm.prefetch(i8* null, i32 0, i32 3, i32 1) +// ARM: call void @llvm.prefetch.p0i8(i8* null, i32 0, i32 3, i32 1) void test_pld() { __pld(0); } // ARM-LABEL: test_pldx -// AArch32: call void @llvm.prefetch(i8* null, i32 1, i32 3, i32 1) -// AArch64: call void @llvm.prefetch(i8* null, i32 1, i32 1, i32 1) +// AArch32: call void @llvm.prefetch.p0i8(i8* null, i32 1, i32 3, i32 1) +// AArch64: call void @llvm.prefetch.p0i8(i8* null, i32 1, i32 1, i32 1) void test_pldx() { __pldx(1, 2, 0, 0); } /* 8.6.2 Instruction prefetch */ // ARM-LABEL: test_pli -// ARM: call void @llvm.prefetch(i8* null, i32 0, i32 3, i32 0) +// ARM: call void @llvm.prefetch.p0i8(i8* null, i32 0, i32 3, i32 0) void test_pli() { __pli(0); } // ARM-LABEL: test_plix -// AArch32: call void @llvm.prefetch(i8* null, i32 0, i32 3, i32 0) -// AArch64: call void @llvm.prefetch(i8* null, i32 0, i32 1, i32 0) +// AArch32: call void @llvm.prefetch.p0i8(i8* null, i32 0, i32 3, i32 0) +// AArch64: call void @llvm.prefetch.p0i8(i8* null, i32 0, i32 1, i32 0) void test_plix() { __plix(2, 0, 0); } diff --git a/clang/test/CodeGen/builtins-arm.c b/clang/test/CodeGen/builtins-arm.c index 020f2b4dc52..4941411bfbb 100644 --- a/clang/test/CodeGen/builtins-arm.c +++ b/clang/test/CodeGen/builtins-arm.c @@ -92,14 +92,13 @@ unsigned rbit(unsigned a) { void prefetch(int i) { __builtin_arm_prefetch(&i, 0, 1); -// CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 0, i32 3, i32 1) + // CHECK: call {{.*}} @llvm.prefetch.p0i8(i8* %{{.*}}, i32 0, i32 3, i32 1) __builtin_arm_prefetch(&i, 1, 1); -// CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 1) - + // CHECK: call {{.*}} @llvm.prefetch.p0i8(i8* %{{.*}}, i32 1, i32 3, i32 1) __builtin_arm_prefetch(&i, 1, 0); -// CHECK: call {{.*}} @llvm.prefetch(i8* %{{.*}}, i32 1, i32 3, i32 0) + // CHECK: call {{.*}} @llvm.prefetch.p0i8(i8* %{{.*}}, i32 1, i32 3, i32 0) } void ldc(const void *i) { diff --git a/clang/test/CodeGen/builtins-arm64.c b/clang/test/CodeGen/builtins-arm64.c index 5ec63fba82b..7095396e6bb 100644 --- a/clang/test/CodeGen/builtins-arm64.c +++ b/clang/test/CodeGen/builtins-arm64.c @@ -46,16 +46,16 @@ void barriers() { void prefetch() { __builtin_arm_prefetch(0, 1, 2, 0, 1); // pstl3keep -// CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 1, i32 1, i32 1) + // CHECK: call {{.*}} @llvm.prefetch.p0i8(i8* null, i32 1, i32 1, i32 1) __builtin_arm_prefetch(0, 0, 0, 1, 1); // pldl1keep -// CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1) + // CHECK: call {{.*}} @llvm.prefetch.p0i8(i8* null, i32 0, i32 0, i32 1) __builtin_arm_prefetch(0, 0, 0, 1, 1); // pldl1strm -// CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 0, i32 1) + // CHECK: call {{.*}} @llvm.prefetch.p0i8(i8* null, i32 0, i32 0, i32 1) __builtin_arm_prefetch(0, 0, 0, 0, 0); // plil1keep -// CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0) + // CHECK: call {{.*}} @llvm.prefetch.p0i8(i8* null, i32 0, i32 3, i32 0) } int32_t jcvt(double v) { diff --git a/clang/test/CodeGen/ppc-xmmintrin.c b/clang/test/CodeGen/ppc-xmmintrin.c index fd81937da63..094f18efcb6 100644 --- a/clang/test/CodeGen/ppc-xmmintrin.c +++ b/clang/test/CodeGen/ppc-xmmintrin.c @@ -1435,7 +1435,7 @@ test_prefetch() { // CHECK: store i8* {{[0-9a-zA-Z_%.]+}}, i8** {{[0-9a-zA-Z_%.]+}}, align 8 // CHECK-NEXT: store i32 {{[0-9a-zA-Z_%.]+}}, i32* {{[0-9a-zA-Z_%.]+}}, align 4 // CHECK-NEXT: [[REG715:[0-9a-zA-Z_%.]+]] = load i8*, i8** {{[0-9a-zA-Z_%.]+}}, align 8 -// CHECK-NEXT: call void @llvm.prefetch(i8* [[REG715]], i32 0, i32 3, i32 1) +// CHECK-NEXT: call void @llvm.prefetch.p0i8(i8* [[REG715]], i32 0, i32 3, i32 1) // CHECK-NEXT: ret void void __attribute__((noinline)) diff --git a/clang/test/CodeGen/pr9614.c b/clang/test/CodeGen/pr9614.c index 63cb5af1868..08089848eeb 100644 --- a/clang/test/CodeGen/pr9614.c +++ b/clang/test/CodeGen/pr9614.c @@ -34,7 +34,7 @@ void f(void) { // CHECK: call void @foo() // CHECK: call i32 @abs(i32 0) // CHECK: call i8* @strrchr( -// CHECK: call void @llvm.prefetch( +// CHECK: call void @llvm.prefetch.p0i8( // CHECK: call i8* @memchr( // CHECK: ret void @@ -42,4 +42,4 @@ void f(void) { // CHECK: declare i32 @abs(i32 // CHECK: declare i8* @strrchr(i8*, i32) // CHECK: declare i8* @memchr( -// CHECK: declare void @llvm.prefetch( +// CHECK: declare void @llvm.prefetch.p0i8( diff --git a/clang/test/CodeGen/prefetch-addr-spaces.c b/clang/test/CodeGen/prefetch-addr-spaces.c new file mode 100644 index 00000000000..87810621f13 --- /dev/null +++ b/clang/test/CodeGen/prefetch-addr-spaces.c @@ -0,0 +1,6 @@ +// RUN: %clang_cc1 -triple x86_64-pc-linux -emit-llvm %s -o - | FileCheck %s + +void f(int __attribute__((address_space(1))) * a, ...) { + __builtin_prefetch(a, 0, 1); + // CHECK: call void @llvm.prefetch.p1i8(i8 addrspace(1)* {{%.+}}, i32 0, i32 1, i32 1) +} diff --git a/clang/test/CodeGen/prefetchw-builtins.c b/clang/test/CodeGen/prefetchw-builtins.c index 53416de46ff..b3a8062acf6 100644 --- a/clang/test/CodeGen/prefetchw-builtins.c +++ b/clang/test/CodeGen/prefetchw-builtins.c @@ -5,12 +5,12 @@ void test_m_prefetch(void *p) { return _m_prefetch(p); -// CHECK-LABEL: define void @test_m_prefetch -// CHECK: call void @llvm.prefetch({{.*}}, i32 0, i32 3, i32 1) + // CHECK-LABEL: define void @test_m_prefetch + // CHECK: call void @llvm.prefetch.p0i8({{.*}}, i32 0, i32 3, i32 1) } void test_m_prefetch_w(void *p) { return _m_prefetchw(p); -// CHECK-LABEL: define void @test_m_prefetch_w -// CHECK: call void @llvm.prefetch({{.*}}, i32 1, i32 3, i32 1) + // CHECK-LABEL: define void @test_m_prefetch_w + // CHECK: call void @llvm.prefetch.p0i8({{.*}}, i32 1, i32 3, i32 1) } diff --git a/clang/test/CodeGen/sse-builtins.c b/clang/test/CodeGen/sse-builtins.c index 4179341fadf..b68a714b43b 100644 --- a/clang/test/CodeGen/sse-builtins.c +++ b/clang/test/CodeGen/sse-builtins.c @@ -503,7 +503,7 @@ __m128 test_mm_or_ps(__m128 A, __m128 B) { void test_mm_prefetch(char const* p) { // CHECK-LABEL: test_mm_prefetch - // CHECK: call void @llvm.prefetch(i8* {{.*}}, i32 0, i32 0, i32 1) + // CHECK: call void @llvm.prefetch.p0i8(i8* {{.*}}, i32 0, i32 0, i32 1) _mm_prefetch(p, 0); } diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td index d6489847868..e3c13dad14c 100644 --- a/llvm/include/llvm/IR/Intrinsics.td +++ b/llvm/include/llvm/IR/Intrinsics.td @@ -451,7 +451,7 @@ def int_thread_pointer : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>, // from being reordered overly much with respect to nearby access to the same // memory while not impeding optimization. def int_prefetch - : Intrinsic<[], [ llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty ], + : Intrinsic<[], [ llvm_anyptr_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty ], [ IntrInaccessibleMemOrArgMemOnly, ReadOnly<0>, NoCapture<0>, ImmArg<1>, ImmArg<2>]>; def int_pcmarker : Intrinsic<[], [llvm_i32_ty]>; diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp index a2d82035282..0800fcffcd2 100644 --- a/llvm/lib/IR/AutoUpgrade.cpp +++ b/llvm/lib/IR/AutoUpgrade.cpp @@ -789,6 +789,19 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { } break; + case 'p': + if (Name == "prefetch") { + // Handle address space overloading. + Type *Tys[] = {F->arg_begin()->getType()}; + if (F->getName() != Intrinsic::getName(Intrinsic::prefetch, Tys)) { + rename(F); + NewFn = + Intrinsic::getDeclaration(F->getParent(), Intrinsic::prefetch, Tys); + return true; + } + } + break; + case 's': if (Name == "stackprotectorcheck") { NewFn = nullptr; diff --git a/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp b/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp index 1fcf1315a17..a972d6fa2fc 100644 --- a/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp +++ b/llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp @@ -312,8 +312,8 @@ bool LoopDataPrefetch::runOnLoop(Loop *L) { IRBuilder<> Builder(MemI); Module *M = BB->getParent()->getParent(); Type *I32 = Type::getInt32Ty(BB->getContext()); - Function *PrefetchFunc = - Intrinsic::getDeclaration(M, Intrinsic::prefetch); + Function *PrefetchFunc = Intrinsic::getDeclaration( + M, Intrinsic::prefetch, PrefPtrValue->getType()); Builder.CreateCall( PrefetchFunc, {PrefPtrValue, diff --git a/llvm/test/Assembler/auto_upgrade_intrinsics.ll b/llvm/test/Assembler/auto_upgrade_intrinsics.ll index 9ca4c4855e7..f75206d61e0 100644 --- a/llvm/test/Assembler/auto_upgrade_intrinsics.ll +++ b/llvm/test/Assembler/auto_upgrade_intrinsics.ll @@ -140,6 +140,21 @@ define void @tests.lifetime.start.end() { ret void } +declare void @llvm.prefetch(i8*, i32, i32, i32) +define void @test.prefetch(i8* %ptr) { +; CHECK-LABEL: @test.prefetch( +; CHECK: @llvm.prefetch.p0i8(i8* %ptr, i32 0, i32 3, i32 2) + call void @llvm.prefetch(i8* %ptr, i32 0, i32 3, i32 2) + ret void +} + +declare void @llvm.prefetch.p0i8(i8*, i32, i32, i32) +define void @test.prefetch.2(i8* %ptr) { +; CHECK-LABEL: @test.prefetch.2( +; CHECK: @llvm.prefetch.p0i8(i8* %ptr, i32 0, i32 3, i32 2) + call void @llvm.prefetch(i8* %ptr, i32 0, i32 3, i32 2) + ret void +} ; This is part of @test.objectsize(), since llvm.objectsize declaration gets ; emitted at the end. diff --git a/llvm/test/Bitcode/compatibility-3.6.ll b/llvm/test/Bitcode/compatibility-3.6.ll index e1481a2c456..3f40733db80 100644 --- a/llvm/test/Bitcode/compatibility-3.6.ll +++ b/llvm/test/Bitcode/compatibility-3.6.ll @@ -1133,7 +1133,7 @@ define void @intrinsics.codegen() { ; CHECK: call void @llvm.stackrestore(i8* %stack) call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) - ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) + ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0) call void @llvm.pcmarker(i32 1) ; CHECK: call void @llvm.pcmarker(i32 1) diff --git a/llvm/test/Bitcode/compatibility-3.7.ll b/llvm/test/Bitcode/compatibility-3.7.ll index 58fa6e12d13..867e0fdc605 100644 --- a/llvm/test/Bitcode/compatibility-3.7.ll +++ b/llvm/test/Bitcode/compatibility-3.7.ll @@ -1164,7 +1164,7 @@ define void @intrinsics.codegen() { ; CHECK: call void @llvm.stackrestore(i8* %stack) call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) - ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) + ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0) call void @llvm.pcmarker(i32 1) ; CHECK: call void @llvm.pcmarker(i32 1) diff --git a/llvm/test/Bitcode/compatibility-3.8.ll b/llvm/test/Bitcode/compatibility-3.8.ll index e96180681d6..7fe0bf6aa5e 100644 --- a/llvm/test/Bitcode/compatibility-3.8.ll +++ b/llvm/test/Bitcode/compatibility-3.8.ll @@ -1319,7 +1319,7 @@ define void @intrinsics.codegen() { ; CHECK: call void @llvm.stackrestore(i8* %stack) call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) - ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) + ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0) call void @llvm.pcmarker(i32 1) ; CHECK: call void @llvm.pcmarker(i32 1) diff --git a/llvm/test/Bitcode/compatibility-3.9.ll b/llvm/test/Bitcode/compatibility-3.9.ll index d715d54ba46..f23b1066ea1 100644 --- a/llvm/test/Bitcode/compatibility-3.9.ll +++ b/llvm/test/Bitcode/compatibility-3.9.ll @@ -1390,7 +1390,7 @@ define void @intrinsics.codegen() { ; CHECK: call void @llvm.stackrestore(i8* %stack) call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) - ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) + ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0) call void @llvm.pcmarker(i32 1) ; CHECK: call void @llvm.pcmarker(i32 1) @@ -1588,7 +1588,7 @@ normal: } declare void @f.writeonly() writeonly -; CHECK: declare void @f.writeonly() #40 +; CHECK: declare void @f.writeonly() #39 ; CHECK: attributes #0 = { alignstack=4 } ; CHECK: attributes #1 = { alignstack=8 } @@ -1629,8 +1629,8 @@ declare void @f.writeonly() writeonly ; CHECK: attributes #36 = { argmemonly nounwind readonly } ; CHECK: attributes #37 = { argmemonly nounwind } ; CHECK: attributes #38 = { nounwind readonly } -; CHECK: attributes #39 = { inaccessiblemem_or_argmemonly nounwind } -; CHECK: attributes #40 = { writeonly } +; CHECK: attributes #39 = { writeonly } +; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly nounwind } ; CHECK: attributes #41 = { builtin } ;; Metadata diff --git a/llvm/test/Bitcode/compatibility-4.0.ll b/llvm/test/Bitcode/compatibility-4.0.ll index a49e64e958f..8963ba60e6c 100644 --- a/llvm/test/Bitcode/compatibility-4.0.ll +++ b/llvm/test/Bitcode/compatibility-4.0.ll @@ -1390,7 +1390,7 @@ define void @intrinsics.codegen() { ; CHECK: call void @llvm.stackrestore(i8* %stack) call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) - ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) + ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0) call void @llvm.pcmarker(i32 1) ; CHECK: call void @llvm.pcmarker(i32 1) @@ -1606,7 +1606,7 @@ normal: declare void @f.writeonly() writeonly -; CHECK: declare void @f.writeonly() #40 +; CHECK: declare void @f.writeonly() #39 ;; Constant Expressions @@ -1654,8 +1654,8 @@ define i8** @constexpr() { ; CHECK: attributes #36 = { argmemonly nounwind readonly } ; CHECK: attributes #37 = { argmemonly nounwind } ; CHECK: attributes #38 = { nounwind readonly } -; CHECK: attributes #39 = { inaccessiblemem_or_argmemonly nounwind } -; CHECK: attributes #40 = { writeonly } +; CHECK: attributes #39 = { writeonly } +; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly nounwind } ; CHECK: attributes #41 = { builtin } ;; Metadata diff --git a/llvm/test/Bitcode/compatibility-5.0.ll b/llvm/test/Bitcode/compatibility-5.0.ll index 420d3139f56..d20d45e6495 100644 --- a/llvm/test/Bitcode/compatibility-5.0.ll +++ b/llvm/test/Bitcode/compatibility-5.0.ll @@ -1400,7 +1400,7 @@ define void @intrinsics.codegen() { ; CHECK: call void @llvm.stackrestore(i8* %stack) call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) - ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) + ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0) call void @llvm.pcmarker(i32 1) ; CHECK: call void @llvm.pcmarker(i32 1) @@ -1616,10 +1616,10 @@ normal: declare void @f.writeonly() writeonly -; CHECK: declare void @f.writeonly() #40 +; CHECK: declare void @f.writeonly() #39 declare void @f.speculatable() speculatable -; CHECK: declare void @f.speculatable() #41 +; CHECK: declare void @f.speculatable() #40 ;; Constant Expressions @@ -1667,9 +1667,9 @@ define i8** @constexpr() { ; CHECK: attributes #36 = { argmemonly nounwind readonly } ; CHECK: attributes #37 = { argmemonly nounwind } ; CHECK: attributes #38 = { nounwind readonly } -; CHECK: attributes #39 = { inaccessiblemem_or_argmemonly nounwind } -; CHECK: attributes #40 = { writeonly } -; CHECK: attributes #41 = { speculatable } +; CHECK: attributes #39 = { writeonly } +; CHECK: attributes #40 = { speculatable } +; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly nounwind } ; CHECK: attributes #42 = { builtin } ; CHECK: attributes #43 = { strictfp } diff --git a/llvm/test/Bitcode/compatibility-6.0.ll b/llvm/test/Bitcode/compatibility-6.0.ll index 3cc00e21a59..35adeaaa6a4 100644 --- a/llvm/test/Bitcode/compatibility-6.0.ll +++ b/llvm/test/Bitcode/compatibility-6.0.ll @@ -1411,7 +1411,7 @@ define void @intrinsics.codegen() { ; CHECK: call void @llvm.stackrestore(i8* %stack) call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) - ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) + ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0) call void @llvm.pcmarker(i32 1) ; CHECK: call void @llvm.pcmarker(i32 1) @@ -1627,10 +1627,10 @@ normal: declare void @f.writeonly() writeonly -; CHECK: declare void @f.writeonly() #40 +; CHECK: declare void @f.writeonly() #39 declare void @f.speculatable() speculatable -; CHECK: declare void @f.speculatable() #41 +; CHECK: declare void @f.speculatable() #40 ;; Constant Expressions @@ -1678,9 +1678,9 @@ define i8** @constexpr() { ; CHECK: attributes #36 = { argmemonly nounwind readonly } ; CHECK: attributes #37 = { argmemonly nounwind } ; CHECK: attributes #38 = { nounwind readonly } -; CHECK: attributes #39 = { inaccessiblemem_or_argmemonly nounwind } -; CHECK: attributes #40 = { writeonly } -; CHECK: attributes #41 = { speculatable } +; CHECK: attributes #39 = { writeonly } +; CHECK: attributes #40 = { speculatable } +; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly nounwind } ; CHECK: attributes #42 = { builtin } ; CHECK: attributes #43 = { strictfp } diff --git a/llvm/test/Bitcode/compatibility.ll b/llvm/test/Bitcode/compatibility.ll index 14cae7ffe90..2d26134211a 100644 --- a/llvm/test/Bitcode/compatibility.ll +++ b/llvm/test/Bitcode/compatibility.ll @@ -1475,7 +1475,7 @@ declare void @llvm.write_register.i32(metadata, i32) declare void @llvm.write_register.i64(metadata, i64) declare i8* @llvm.stacksave() declare void @llvm.stackrestore(i8*) -declare void @llvm.prefetch(i8*, i32, i32, i32) +declare void @llvm.prefetch.p0i8(i8*, i32, i32, i32) declare void @llvm.pcmarker(i32) declare i64 @llvm.readcyclecounter() declare void @llvm.clear_cache(i8*, i8*) @@ -1502,8 +1502,8 @@ define void @intrinsics.codegen() { call void @llvm.stackrestore(i8* %stack) ; CHECK: call void @llvm.stackrestore(i8* %stack) - call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) - ; CHECK: call void @llvm.prefetch(i8* %stack, i32 0, i32 3, i32 0) + call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0) + ; CHECK: call void @llvm.prefetch.p0i8(i8* %stack, i32 0, i32 3, i32 0) call void @llvm.pcmarker(i32 1) ; CHECK: call void @llvm.pcmarker(i32 1) diff --git a/llvm/test/Verifier/intrinsic-immarg.ll b/llvm/test/Verifier/intrinsic-immarg.ll index 53812aee934..9a5df67a564 100644 --- a/llvm/test/Verifier/intrinsic-immarg.ll +++ b/llvm/test/Verifier/intrinsic-immarg.ll @@ -159,7 +159,7 @@ declare void @llvm.prefetch(i8*, i32, i32, i32) define void @test_prefetch(i8* %ptr, i32 %arg0, i32 %arg1) { ; CHECK: immarg operand has non-immediate parameter ; CHECK-NEXT: i32 %arg0 - ; CHECK-NEXT: call void @llvm.prefetch(i8* %ptr, i32 %arg0, i32 0, i32 0) + ; CHECK-NEXT: call void @llvm.prefetch.p0i8(i8* %ptr, i32 %arg0, i32 0, i32 0) ; CHECK: immarg operand has non-immediate parameter ; CHECK-NEXT: i32 %arg1 call void @llvm.prefetch(i8* %ptr, i32 %arg0, i32 0, i32 0) |
