diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/shifter_operand.ll | 15 |
2 files changed, 19 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index cd73021dfc6..024244092a3 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -548,8 +548,11 @@ bool ARMDAGToDAGISel::SelectImmShifterOperand(SDValue N, unsigned PowerOfTwo = 0; SDValue NewMulConst; if (canExtractShiftFromMul(N, 31, PowerOfTwo, NewMulConst)) { + BaseReg = SDValue(Select(CurDAG->getNode(ISD::MUL, SDLoc(N), MVT::i32, + N.getOperand(0), NewMulConst) + .getNode()), + 0); replaceDAGValue(N.getOperand(1), NewMulConst); - BaseReg = N; Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ARM_AM::lsl, PowerOfTwo), SDLoc(N), MVT::i32); diff --git a/llvm/test/CodeGen/ARM/shifter_operand.ll b/llvm/test/CodeGen/ARM/shifter_operand.ll index 11a8ee6ef7d..5d44eb0f11d 100644 --- a/llvm/test/CodeGen/ARM/shifter_operand.ll +++ b/llvm/test/CodeGen/ARM/shifter_operand.ll @@ -224,3 +224,18 @@ entry: %conv = zext i8 %0 to i32 ret i32 %conv } + + +define void @test_well_formed_dag(i32 %in1, i32 %in2, i32* %addr) { +; CHECK-LABEL: test_well_formed_dag: +; CHECK-ARM: movw [[SMALL_CONST:r[0-9]+]], #675 +; CHECK-ARM: mul [[SMALL_PROD:r[0-9]+]], r0, [[SMALL_CONST]] +; CHECK-ARM: add {{r[0-9]+}}, r1, [[SMALL_PROD]], lsl #7 + + %mul.small = mul i32 %in1, 675 + store i32 %mul.small, i32* %addr + %mul.big = mul i32 %in1, 86400 + %add = add i32 %in2, %mul.big + store i32 %add, i32* %addr + ret void +} |
