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-rw-r--r--llvm/test/CodeGen/X86/addcarry.ll220
-rw-r--r--llvm/test/CodeGen/X86/subcarry.ll78
2 files changed, 298 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/addcarry.ll b/llvm/test/CodeGen/X86/addcarry.ll
index 015a8f1974e..a4ea7d00556 100644
--- a/llvm/test/CodeGen/X86/addcarry.ll
+++ b/llvm/test/CodeGen/X86/addcarry.ll
@@ -889,3 +889,223 @@ define void @PR39464(%struct.U192* noalias nocapture sret %0, %struct.U192* noca
store i64 %31, i64* %32, align 8
ret void
}
+
+
+%uint128 = type { i64, i64 }
+
+define zeroext i1 @uaddo_U128_without_i128_or(i64 %0, i64 %1, i64 %2, i64 %3, %uint128* nocapture %4) nounwind {
+; CHECK-LABEL: uaddo_U128_without_i128_or:
+; CHECK: # %bb.0:
+; CHECK-NEXT: addq %rcx, %rsi
+; CHECK-NEXT: setb %cl
+; CHECK-NEXT: addq %rdx, %rdi
+; CHECK-NEXT: adcq $0, %rsi
+; CHECK-NEXT: setb %al
+; CHECK-NEXT: orb %cl, %al
+; CHECK-NEXT: movq %rsi, (%r8)
+; CHECK-NEXT: movq %rdi, 8(%r8)
+; CHECK-NEXT: retq
+ %6 = add i64 %2, %0
+ %7 = icmp ult i64 %6, %0
+ %8 = add i64 %3, %1
+ %9 = icmp ult i64 %8, %1
+ %10 = zext i1 %7 to i64
+ %11 = add i64 %8, %10
+ %12 = icmp ult i64 %11, %8
+ %13 = or i1 %9, %12
+ %14 = getelementptr inbounds %uint128, %uint128* %4, i64 0, i32 0
+ store i64 %11, i64* %14, align 8
+ %15 = getelementptr inbounds %uint128, %uint128* %4, i64 0, i32 1
+ store i64 %6, i64* %15, align 8
+ ret i1 %13
+}
+
+
+%uint192 = type { i64, i64, i64 }
+
+define void @add_U192_without_i128_or(%uint192* sret %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64 %6) nounwind {
+; CHECK-LABEL: add_U192_without_i128_or:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: addq %r9, %rdx
+; CHECK-NEXT: setb %dil
+; CHECK-NEXT: addq %r8, %rsi
+; CHECK-NEXT: adcq $0, %rdx
+; CHECK-NEXT: setb %r8b
+; CHECK-NEXT: orb %dil, %r8b
+; CHECK-NEXT: addq {{[0-9]+}}(%rsp), %rcx
+; CHECK-NEXT: movzbl %r8b, %edi
+; CHECK-NEXT: addq %rcx, %rdi
+; CHECK-NEXT: movq %rdi, (%rax)
+; CHECK-NEXT: movq %rdx, 8(%rax)
+; CHECK-NEXT: movq %rsi, 16(%rax)
+; CHECK-NEXT: retq
+ %8 = add i64 %4, %1
+ %9 = icmp ult i64 %8, %1
+ %10 = add i64 %5, %2
+ %11 = icmp ult i64 %10, %2
+ %12 = zext i1 %9 to i64
+ %13 = add i64 %10, %12
+ %14 = icmp ult i64 %13, %10
+ %15 = or i1 %11, %14
+ %16 = add i64 %6, %3
+ %17 = zext i1 %15 to i64
+ %18 = add i64 %16, %17
+ %19 = getelementptr inbounds %uint192, %uint192* %0, i64 0, i32 0
+ store i64 %18, i64* %19, align 8
+ %20 = getelementptr inbounds %uint192, %uint192* %0, i64 0, i32 1
+ store i64 %13, i64* %20, align 8
+ %21 = getelementptr inbounds %uint192, %uint192* %0, i64 0, i32 2
+ store i64 %8, i64* %21, align 8
+ ret void
+}
+
+
+%uint256 = type { %uint128, %uint128 }
+
+; Classic unrolled 256-bit addition implementation using i64 as the word type.
+; It starts by adding least significant words and propagates carry to additions of the higher words.
+define void @add_U256_without_i128_or_by_i64_words(%uint256* sret %0, %uint256* %1, %uint256* %2) nounwind {
+; CHECK-LABEL: add_U256_without_i128_or_by_i64_words:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: movq (%rdx), %r9
+; CHECK-NEXT: movq 8(%rdx), %r10
+; CHECK-NEXT: addq 8(%rsi), %r10
+; CHECK-NEXT: setb %r8b
+; CHECK-NEXT: addq (%rsi), %r9
+; CHECK-NEXT: adcq $0, %r10
+; CHECK-NEXT: setb %cl
+; CHECK-NEXT: orb %r8b, %cl
+; CHECK-NEXT: movq 16(%rdx), %rdi
+; CHECK-NEXT: addq 16(%rsi), %rdi
+; CHECK-NEXT: setb %r8b
+; CHECK-NEXT: movzbl %cl, %r11d
+; CHECK-NEXT: addq %rdi, %r11
+; CHECK-NEXT: setb %cl
+; CHECK-NEXT: orb %r8b, %cl
+; CHECK-NEXT: movq 24(%rdx), %rdx
+; CHECK-NEXT: addq 24(%rsi), %rdx
+; CHECK-NEXT: movzbl %cl, %ecx
+; CHECK-NEXT: addq %rdx, %rcx
+; CHECK-NEXT: movq %rcx, (%rax)
+; CHECK-NEXT: movq %r11, 8(%rax)
+; CHECK-NEXT: movq %r10, 16(%rax)
+; CHECK-NEXT: movq %r9, 24(%rax)
+; CHECK-NEXT: retq
+ %4 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 0, i32 0
+ %5 = load i64, i64* %4, align 8
+ %6 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 0, i32 0
+ %7 = load i64, i64* %6, align 8
+ %8 = add i64 %7, %5
+ %9 = icmp ult i64 %8, %5
+ %10 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 0, i32 1
+ %11 = load i64, i64* %10, align 8
+ %12 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 0, i32 1
+ %13 = load i64, i64* %12, align 8
+ %14 = add i64 %13, %11
+ %15 = icmp ult i64 %14, %11
+ %16 = zext i1 %9 to i64
+ %17 = add i64 %14, %16
+ %18 = icmp ult i64 %17, %16
+ %19 = or i1 %15, %18
+ %20 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 1, i32 0
+ %21 = load i64, i64* %20, align 8
+ %22 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 1, i32 0
+ %23 = load i64, i64* %22, align 8
+ %24 = add i64 %23, %21
+ %25 = icmp ult i64 %24, %21
+ %26 = zext i1 %19 to i64
+ %27 = add i64 %24, %26
+ %28 = icmp ult i64 %27, %26
+ %29 = or i1 %25, %28
+ %30 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 1, i32 1
+ %31 = load i64, i64* %30, align 8
+ %32 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 1, i32 1
+ %33 = load i64, i64* %32, align 8
+ %34 = add i64 %33, %31
+ %35 = zext i1 %29 to i64
+ %36 = add i64 %34, %35
+ %37 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 0, i32 0
+ store i64 %36, i64* %37, align 8
+ %38 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 0, i32 1
+ store i64 %27, i64* %38, align 8
+ %39 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 1, i32 0
+ store i64 %17, i64* %39, align 8
+ %40 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 1, i32 1
+ store i64 %8, i64* %40, align 8
+ ret void
+}
+
+; The 256-bit addition implementation using two inlined uaddo procedures for U128 type { i64, i64 }.
+; This is similar to how LLVM legalize types in CodeGen.
+define void @add_U256_without_i128_or_recursive(%uint256* sret %0, %uint256* %1, %uint256* %2) nounwind {
+; CHECK-LABEL: add_U256_without_i128_or_recursive:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: movq (%rdx), %r9
+; CHECK-NEXT: movq 8(%rdx), %rdi
+; CHECK-NEXT: addq 8(%rsi), %rdi
+; CHECK-NEXT: setb %r8b
+; CHECK-NEXT: addq (%rsi), %r9
+; CHECK-NEXT: adcq $0, %rdi
+; CHECK-NEXT: setb %cl
+; CHECK-NEXT: orb %r8b, %cl
+; CHECK-NEXT: movq 16(%rdx), %r8
+; CHECK-NEXT: movq 24(%rdx), %r10
+; CHECK-NEXT: xorl %edx, %edx
+; CHECK-NEXT: addq 16(%rsi), %r8
+; CHECK-NEXT: setb %dl
+; CHECK-NEXT: addq 24(%rsi), %r10
+; CHECK-NEXT: movzbl %cl, %ecx
+; CHECK-NEXT: addq %r8, %rcx
+; CHECK-NEXT: adcq %r10, %rdx
+; CHECK-NEXT: movq %r9, (%rax)
+; CHECK-NEXT: movq %rdi, 8(%rax)
+; CHECK-NEXT: movq %rcx, 16(%rax)
+; CHECK-NEXT: movq %rdx, 24(%rax)
+; CHECK-NEXT: retq
+ %4 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 0, i32 0
+ %5 = load i64, i64* %4, align 8
+ %6 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 0, i32 1
+ %7 = load i64, i64* %6, align 8
+ %8 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 0, i32 0
+ %9 = load i64, i64* %8, align 8
+ %10 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 0, i32 1
+ %11 = load i64, i64* %10, align 8
+ %12 = add i64 %9, %5
+ %13 = icmp ult i64 %12, %5
+ %14 = add i64 %11, %7
+ %15 = icmp ult i64 %14, %7
+ %16 = zext i1 %13 to i64
+ %17 = add i64 %14, %16
+ %18 = icmp ult i64 %17, %14
+ %19 = or i1 %15, %18
+ %20 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 1, i32 0
+ %21 = load i64, i64* %20, align 8
+ %22 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 1, i32 1
+ %23 = load i64, i64* %22, align 8
+ %24 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 1, i32 0
+ %25 = load i64, i64* %24, align 8
+ %26 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 1, i32 1
+ %27 = load i64, i64* %26, align 8
+ %28 = add i64 %25, %21
+ %29 = icmp ult i64 %28, %21
+ %30 = add i64 %27, %23
+ %31 = zext i1 %29 to i64
+ %32 = add i64 %30, %31
+ %33 = zext i1 %19 to i64
+ %34 = add i64 %28, %33
+ %35 = icmp ult i64 %34, %28
+ %36 = zext i1 %35 to i64
+ %37 = add i64 %32, %36
+ %38 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 0, i32 0
+ store i64 %12, i64* %38, align 8
+ %39 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 0, i32 1
+ store i64 %17, i64* %39, align 8
+ %40 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 1, i32 0
+ store i64 %34, i64* %40, align 8
+ %41 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 1, i32 1
+ store i64 %37, i64* %41, align 8
+ ret void
+}
diff --git a/llvm/test/CodeGen/X86/subcarry.ll b/llvm/test/CodeGen/X86/subcarry.ll
index 212b3f9caee..9afbcc8db21 100644
--- a/llvm/test/CodeGen/X86/subcarry.ll
+++ b/llvm/test/CodeGen/X86/subcarry.ll
@@ -444,3 +444,81 @@ define void @PR39464(%struct.U192* noalias nocapture sret %0, %struct.U192* noca
store i64 %31, i64* %32, align 8
ret void
}
+
+%uint128 = type { i64, i64 }
+%uint256 = type { %uint128, %uint128 }
+
+; The 256-bit subtraction implementation using two inlined usubo procedures for U128 type { i64, i64 }.
+; This is similar to how LLVM legalize types in CodeGen.
+define void @sub_U256_without_i128_or_recursive(%uint256* sret %0, %uint256* %1, %uint256* %2) nounwind {
+; CHECK-LABEL: sub_U256_without_i128_or_recursive:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movq %rdi, %rax
+; CHECK-NEXT: movq (%rsi), %r8
+; CHECK-NEXT: movq 8(%rsi), %r10
+; CHECK-NEXT: xorl %ecx, %ecx
+; CHECK-NEXT: subq (%rdx), %r8
+; CHECK-NEXT: setb %cl
+; CHECK-NEXT: subq 8(%rdx), %r10
+; CHECK-NEXT: setb %r9b
+; CHECK-NEXT: subq %rcx, %r10
+; CHECK-NEXT: setb %cl
+; CHECK-NEXT: orb %r9b, %cl
+; CHECK-NEXT: movq 16(%rsi), %rdi
+; CHECK-NEXT: movq 24(%rsi), %rsi
+; CHECK-NEXT: xorl %r9d, %r9d
+; CHECK-NEXT: subq 16(%rdx), %rdi
+; CHECK-NEXT: setb %r9b
+; CHECK-NEXT: subq 24(%rdx), %rsi
+; CHECK-NEXT: movzbl %cl, %ecx
+; CHECK-NEXT: subq %rcx, %rdi
+; CHECK-NEXT: sbbq %r9, %rsi
+; CHECK-NEXT: movq %r8, (%rax)
+; CHECK-NEXT: movq %r10, 8(%rax)
+; CHECK-NEXT: movq %rdi, 16(%rax)
+; CHECK-NEXT: movq %rsi, 24(%rax)
+; CHECK-NEXT: retq
+ %4 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 0, i32 0
+ %5 = load i64, i64* %4, align 8
+ %6 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 0, i32 1
+ %7 = load i64, i64* %6, align 8
+ %8 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 0, i32 0
+ %9 = load i64, i64* %8, align 8
+ %10 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 0, i32 1
+ %11 = load i64, i64* %10, align 8
+ %12 = sub i64 %5, %9
+ %13 = icmp ult i64 %5, %9
+ %14 = sub i64 %7, %11
+ %15 = icmp ult i64 %7, %11
+ %16 = zext i1 %13 to i64
+ %17 = sub i64 %14, %16
+ %18 = icmp ult i64 %14, %16
+ %19 = or i1 %15, %18
+ %20 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 1, i32 0
+ %21 = load i64, i64* %20, align 8
+ %22 = getelementptr inbounds %uint256, %uint256* %1, i64 0, i32 1, i32 1
+ %23 = load i64, i64* %22, align 8
+ %24 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 1, i32 0
+ %25 = load i64, i64* %24, align 8
+ %26 = getelementptr inbounds %uint256, %uint256* %2, i64 0, i32 1, i32 1
+ %27 = load i64, i64* %26, align 8
+ %28 = sub i64 %21, %25
+ %29 = icmp ult i64 %21, %25
+ %30 = sub i64 %23, %27
+ %31 = zext i1 %29 to i64
+ %32 = sub i64 %30, %31
+ %33 = zext i1 %19 to i64
+ %34 = sub i64 %28, %33
+ %35 = icmp ult i64 %28, %33
+ %36 = zext i1 %35 to i64
+ %37 = sub i64 %32, %36
+ %38 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 0, i32 0
+ store i64 %12, i64* %38, align 8
+ %39 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 0, i32 1
+ store i64 %17, i64* %39, align 8
+ %40 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 1, i32 0
+ store i64 %34, i64* %40, align 8
+ %41 = getelementptr inbounds %uint256, %uint256* %0, i64 0, i32 1, i32 1
+ store i64 %37, i64* %41, align 8
+ ret void
+}
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