diff options
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/captured-frame-index.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/pic-simple.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/pic-static.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/tls_static.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/tls-models.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/tls.ll | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/tls16.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/tls16_2.ll | 2 |
8 files changed, 11 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/captured-frame-index.ll b/llvm/test/CodeGen/AMDGPU/captured-frame-index.ll index 55b32305687..a752b6129fb 100644 --- a/llvm/test/CodeGen/AMDGPU/captured-frame-index.ll +++ b/llvm/test/CodeGen/AMDGPU/captured-frame-index.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=amdgcn -mattr=-promote-alloca -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s +; RUN: llc -mtriple=amdgcn-- -mattr=-promote-alloca -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s ; GCN-LABEL: {{^}}store_fi_lifetime: ; GCN: v_mov_b32_e32 [[FI:v[0-9]+]], 0{{$}} diff --git a/llvm/test/CodeGen/Hexagon/pic-simple.ll b/llvm/test/CodeGen/Hexagon/pic-simple.ll index fa223d5372e..46d95204f2e 100644 --- a/llvm/test/CodeGen/Hexagon/pic-simple.ll +++ b/llvm/test/CodeGen/Hexagon/pic-simple.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv5 -relocation-model=pic < %s | FileCheck %s +; RUN: llc -mtriple=hexagon-- -mcpu=hexagonv5 -relocation-model=pic < %s | FileCheck %s ; CHECK: r{{[0-9]+}} = add({{pc|PC}}, ##_GLOBAL_OFFSET_TABLE_@PCREL) ; CHECK: r{{[0-9]+}} = memw(r{{[0-9]+}}{{.*}}+{{.*}}##src@GOT) diff --git a/llvm/test/CodeGen/Hexagon/pic-static.ll b/llvm/test/CodeGen/Hexagon/pic-static.ll index f4ccc6b9ee7..66d7734f2cf 100644 --- a/llvm/test/CodeGen/Hexagon/pic-static.ll +++ b/llvm/test/CodeGen/Hexagon/pic-static.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv5 -relocation-model=pic < %s | FileCheck %s +; RUN: llc -mtriple=hexagon-- -mcpu=hexagonv5 -relocation-model=pic < %s | FileCheck %s ; CHECK-DAG: r{{[0-9]+}} = add({{pc|PC}}, ##_GLOBAL_OFFSET_TABLE_@PCREL) ; CHECK-DAG: r{{[0-9]+}} = add({{pc|PC}}, ##x@PCREL) diff --git a/llvm/test/CodeGen/Hexagon/tls_static.ll b/llvm/test/CodeGen/Hexagon/tls_static.ll index ad2ca716b70..dbd3bd7b4ba 100644 --- a/llvm/test/CodeGen/Hexagon/tls_static.ll +++ b/llvm/test/CodeGen/Hexagon/tls_static.ll @@ -1,4 +1,4 @@ -; RUN: llc -O0 -march=hexagon -relocation-model=static < %s | FileCheck %s +; RUN: llc -O0 -mtriple=hexagon-- -relocation-model=static < %s | FileCheck %s @dst_le = thread_local global i32 0, align 4 @src_le = thread_local global i32 0, align 4 diff --git a/llvm/test/CodeGen/Mips/tls-models.ll b/llvm/test/CodeGen/Mips/tls-models.ll index ca3c7fde19d..31c4438dda3 100644 --- a/llvm/test/CodeGen/Mips/tls-models.ll +++ b/llvm/test/CodeGen/Mips/tls-models.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck -check-prefix=CHECK-PIC %s -; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck -check-prefix=CHECK-NONPIC %s +; RUN: llc -mtriple=mipsel-- -relocation-model=pic < %s | FileCheck -check-prefix=CHECK-PIC %s +; RUN: llc -mtriple=mipsel-- -relocation-model=static < %s | FileCheck -check-prefix=CHECK-NONPIC %s @external_gd = external thread_local global i32 @internal_gd = internal thread_local global i32 42 diff --git a/llvm/test/CodeGen/Mips/tls.ll b/llvm/test/CodeGen/Mips/tls.ll index 8968567cb42..b416f1f6a5e 100644 --- a/llvm/test/CodeGen/Mips/tls.ll +++ b/llvm/test/CodeGen/Mips/tls.ll @@ -1,8 +1,8 @@ -; RUN: llc -march=mipsel -disable-mips-delay-filler -relocation-model=pic < %s | \ +; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler -relocation-model=pic < %s | \ ; RUN: FileCheck %s -check-prefixes=PIC,CHECK -; RUN: llc -march=mipsel -relocation-model=static -disable-mips-delay-filler < \ +; RUN: llc -mtriple=mipsel-- -relocation-model=static -disable-mips-delay-filler < \ ; RUN: %s | FileCheck %s -check-prefixes=STATIC,CHECK -; RUN: llc -march=mipsel -relocation-model=static -disable-mips-delay-filler \ +; RUN: llc -mtriple=mipsel-- -relocation-model=static -disable-mips-delay-filler \ ; RUN: -mips-fix-global-base-reg=false < %s | \ ; RUN: FileCheck %s -check-prefixes=STATICGP,CHECK diff --git a/llvm/test/CodeGen/Mips/tls16.ll b/llvm/test/CodeGen/Mips/tls16.ll index 349e381af2b..8ab7416ff3d 100644 --- a/llvm/test/CodeGen/Mips/tls16.ll +++ b/llvm/test/CodeGen/Mips/tls16.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PIC16 +; RUN: llc -mtriple=mipsel-- -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PIC16 @a = thread_local global i32 4, align 4 diff --git a/llvm/test/CodeGen/Mips/tls16_2.ll b/llvm/test/CodeGen/Mips/tls16_2.ll index b232c8534c5..1fdcb655c2b 100644 --- a/llvm/test/CodeGen/Mips/tls16_2.ll +++ b/llvm/test/CodeGen/Mips/tls16_2.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PIC16 +; RUN: llc -mtriple=mipsel-- -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PIC16 @f.i = internal thread_local unnamed_addr global i32 1, align 4 |
