diff options
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 5 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/sjlj_no0x.ll | 29 |
2 files changed, 32 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index d34ee2e5099..f004ce49cac 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -770,9 +770,10 @@ def spe2dis : Operand<iPTR> { // SPE displacement where the imm is 2-aligned. } // A single-register address. This is used with the SjLj -// pseudo-instructions. +// pseudo-instructions which tranlates to LD/LWZ. These instructions requires +// G8RC_NOX0 registers. def memr : Operand<iPTR> { - let MIOperandInfo = (ops ptr_rc:$ptrreg); + let MIOperandInfo = (ops ptr_rc_nor0:$ptrreg); } def PPCTLSRegOperand : AsmOperandClass { let Name = "TLSReg"; let PredicateMethod = "isTLSReg"; diff --git a/llvm/test/CodeGen/PowerPC/sjlj_no0x.ll b/llvm/test/CodeGen/PowerPC/sjlj_no0x.ll new file mode 100644 index 00000000000..2018bcbbc93 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/sjlj_no0x.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s + +target datalayout = "e-m:e-i64:64-n32:64" +target triple = "powerpc64le-unknown-linux-gnu" + +; Function Attrs: noinline nounwind +define void @_Z23BuiltinLongJmpFunc1_bufv() #0 { +entry: + call void @llvm.eh.sjlj.longjmp(i8* bitcast (void ()* @_Z23BuiltinLongJmpFunc1_bufv to i8*)) + unreachable + +; CHECK: @_Z23BuiltinLongJmpFunc1_bufv +; CHECK: addis [[REG:[0-9]+]], 2, .LC0@toc@ha +; CHECK: ld 31, 0([[REG]]) +; CHECK: ld [[REG2:[0-9]+]], 8([[REG]]) +; CHECK-DAG: ld 1, 16([[REG]]) +; CHECK-DAG: ld 30, 32([[REG]]) +; CHECK-DAG: ld 2, 24([[REG]]) +; CHECK-DAG: mtctr [[REG2]] +; CHECK: bctr + +return: ; No predecessors! + ret void +} + +; Function Attrs: noreturn nounwind +declare void @llvm.eh.sjlj.longjmp(i8*) #1 |
