diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/sse_partial_update.ll | 5 |
2 files changed, 4 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index c37f5c8f087..d65c2d73764 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -5347,11 +5347,8 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl( // Check switch flag if (NoFusing) return nullptr; - // Unless optimizing for size, don't fold to avoid partial - // register update stalls - // FIXME: Use Function::optForSize(). - if (!MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize) && - hasPartialRegUpdate(MI->getOpcode())) + // Avoid partial register update stalls unless optimizing for size. + if (!MF.getFunction()->optForSize() && hasPartialRegUpdate(MI->getOpcode())) return nullptr; // Determine the alignment of the load. diff --git a/llvm/test/CodeGen/X86/sse_partial_update.ll b/llvm/test/CodeGen/X86/sse_partial_update.ll index 8bc44e270ef..8d61428420f 100644 --- a/llvm/test/CodeGen/X86/sse_partial_update.ll +++ b/llvm/test/CodeGen/X86/sse_partial_update.ll @@ -113,9 +113,8 @@ define <2 x double> @load_fold_cvtss2sd_int_optsize(<4 x float> *%a) optsize { define <2 x double> @load_fold_cvtss2sd_int_minsize(<4 x float> *%a) minsize { ; CHECK-LABEL: load_fold_cvtss2sd_int_minsize: -; CHECK: movaps (%rdi), %xmm1 -; CHECK-NEXT: xorps %xmm0, %xmm0 -; CHECK-NEXT: cvtss2sd %xmm1, %xmm0 +; CHECK: xorps %xmm0, %xmm0 +; CHECK-NEXT: cvtss2sd (%rdi), %xmm0 ; CHECK-NEXT: retq %ld = load <4 x float>, <4 x float> *%a %x = call <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double> <double 0x0, double 0x0>, <4 x float> %ld) |
