diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll | 3081 |
1 files changed, 1181 insertions, 1900 deletions
diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll index 2cb6449f79a..6277fdd5d09 100644 --- a/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll +++ b/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll @@ -1,77 +1,52 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=avx,aes,pclmul | FileCheck %s --check-prefix=ALL --check-prefix=X32 -; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=avx,aes,pclmul | FileCheck %s --check-prefix=ALL --check-prefix=X64 +; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=avx,aes,pclmul | FileCheck %s --check-prefixes=CHECK,X86 +; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=avx,aes,pclmul | FileCheck %s --check-prefixes=CHECK,X64 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx-builtins.c define <4 x double> @test_mm256_add_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_add_pd: -; X32: # %bb.0: -; X32-NEXT: vaddpd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_add_pd: -; X64: # %bb.0: -; X64-NEXT: vaddpd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_add_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vaddpd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = fadd <4 x double> %a0, %a1 ret <4 x double> %res } define <8 x float> @test_mm256_add_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_add_ps: -; X32: # %bb.0: -; X32-NEXT: vaddps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_add_ps: -; X64: # %bb.0: -; X64-NEXT: vaddps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_add_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vaddps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = fadd <8 x float> %a0, %a1 ret <8 x float> %res } define <4 x double> @test_mm256_addsub_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_addsub_pd: -; X32: # %bb.0: -; X32-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_addsub_pd: -; X64: # %bb.0: -; X64-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_addsub_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> %a0, <4 x double> %a1) ret <4 x double> %res } declare <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double>, <4 x double>) nounwind readnone define <8 x float> @test_mm256_addsub_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_addsub_ps: -; X32: # %bb.0: -; X32-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_addsub_ps: -; X64: # %bb.0: -; X64-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_addsub_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> %a0, <8 x float> %a1) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float>, <8 x float>) nounwind readnone define <4 x double> @test_mm256_and_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_and_pd: -; X32: # %bb.0: -; X32-NEXT: vandps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_and_pd: -; X64: # %bb.0: -; X64-NEXT: vandps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_and_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vandps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %1 = bitcast <4 x double> %a0 to <4 x i64> %2 = bitcast <4 x double> %a1 to <4 x i64> %res = and <4 x i64> %1, %2 @@ -80,15 +55,10 @@ define <4 x double> @test_mm256_and_pd(<4 x double> %a0, <4 x double> %a1) nounw } define <8 x float> @test_mm256_and_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_and_ps: -; X32: # %bb.0: -; X32-NEXT: vandps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_and_ps: -; X64: # %bb.0: -; X64-NEXT: vandps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_and_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vandps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %1 = bitcast <8 x float> %a0 to <8 x i32> %2 = bitcast <8 x float> %a1 to <8 x i32> %res = and <8 x i32> %1, %2 @@ -97,21 +67,13 @@ define <8 x float> @test_mm256_and_ps(<8 x float> %a0, <8 x float> %a1) nounwind } define <4 x double> @test_mm256_andnot_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_andnot_pd: -; X32: # %bb.0: -; X32-NEXT: vxorps %xmm2, %xmm2, %xmm2 -; X32-NEXT: vcmptrueps %ymm2, %ymm2, %ymm2 -; X32-NEXT: vxorps %ymm2, %ymm0, %ymm0 -; X32-NEXT: vandps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_andnot_pd: -; X64: # %bb.0: -; X64-NEXT: vxorps %xmm2, %xmm2, %xmm2 -; X64-NEXT: vcmptrueps %ymm2, %ymm2, %ymm2 -; X64-NEXT: vxorps %ymm2, %ymm0, %ymm0 -; X64-NEXT: vandps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_andnot_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 +; CHECK-NEXT: vcmptrueps %ymm2, %ymm2, %ymm2 +; CHECK-NEXT: vxorps %ymm2, %ymm0, %ymm0 +; CHECK-NEXT: vandps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %1 = bitcast <4 x double> %a0 to <4 x i64> %2 = bitcast <4 x double> %a1 to <4 x i64> %3 = xor <4 x i64> %1, <i64 -1, i64 -1, i64 -1, i64 -1> @@ -121,15 +83,10 @@ define <4 x double> @test_mm256_andnot_pd(<4 x double> %a0, <4 x double> %a1) no } define <8 x float> @test_mm256_andnot_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_andnot_ps: -; X32: # %bb.0: -; X32-NEXT: vandnps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_andnot_ps: -; X64: # %bb.0: -; X64-NEXT: vandnps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_andnot_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vandnps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %1 = bitcast <8 x float> %a0 to <8 x i32> %2 = bitcast <8 x float> %a1 to <8 x i32> %3 = xor <8 x i32> %1, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> @@ -139,69 +96,49 @@ define <8 x float> @test_mm256_andnot_ps(<8 x float> %a0, <8 x float> %a1) nounw } define <4 x double> @test_mm256_blend_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_blend_pd: -; X32: # %bb.0: -; X32-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3,4,5],ymm0[6,7] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_blend_pd: -; X64: # %bb.0: -; X64-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3,4,5],ymm0[6,7] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_blend_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3,4,5],ymm0[6,7] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 0, i32 5, i32 6, i32 3> ret <4 x double> %res } define <8 x float> @test_mm256_blend_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_blend_ps: -; X32: # %bb.0: -; X32-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4,5,6],ymm1[7] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_blend_ps: -; X64: # %bb.0: -; X64-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4,5,6],ymm1[7] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_blend_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4,5,6],ymm1[7] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 15> ret <8 x float> %res } define <4 x double> @test_mm256_blendv_pd(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) nounwind { -; X32-LABEL: test_mm256_blendv_pd: -; X32: # %bb.0: -; X32-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_blendv_pd: -; X64: # %bb.0: -; X64-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_blendv_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) ret <4 x double> %res } declare <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double>, <4 x double>, <4 x double>) nounwind readnone define <8 x float> @test_mm256_blendv_ps(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) nounwind { -; X32-LABEL: test_mm256_blendv_ps: -; X32: # %bb.0: -; X32-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_blendv_ps: -; X64: # %bb.0: -; X64-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_blendv_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone define <4 x double> @test_mm256_broadcast_pd(<2 x double>* %a0) nounwind { -; X32-LABEL: test_mm256_broadcast_pd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] -; X32-NEXT: retl +; X86-LABEL: test_mm256_broadcast_pd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_broadcast_pd: ; X64: # %bb.0: @@ -213,11 +150,11 @@ define <4 x double> @test_mm256_broadcast_pd(<2 x double>* %a0) nounwind { } define <8 x float> @test_mm256_broadcast_ps(<4 x float>* %a0) nounwind { -; X32-LABEL: test_mm256_broadcast_ps: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] -; X32-NEXT: retl +; X86-LABEL: test_mm256_broadcast_ps: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_broadcast_ps: ; X64: # %bb.0: @@ -229,11 +166,11 @@ define <8 x float> @test_mm256_broadcast_ps(<4 x float>* %a0) nounwind { } define <4 x double> @test_mm256_broadcast_sd(double* %a0) nounwind { -; X32-LABEL: test_mm256_broadcast_sd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vbroadcastsd (%eax), %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_broadcast_sd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vbroadcastsd (%eax), %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_broadcast_sd: ; X64: # %bb.0: @@ -248,11 +185,11 @@ define <4 x double> @test_mm256_broadcast_sd(double* %a0) nounwind { } define <4 x float> @test_mm_broadcast_ss(float* %a0) nounwind { -; X32-LABEL: test_mm_broadcast_ss: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vbroadcastss (%eax), %xmm0 -; X32-NEXT: retl +; X86-LABEL: test_mm_broadcast_ss: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vbroadcastss (%eax), %xmm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm_broadcast_ss: ; X64: # %bb.0: @@ -267,11 +204,11 @@ define <4 x float> @test_mm_broadcast_ss(float* %a0) nounwind { } define <8 x float> @test_mm256_broadcast_ss(float* %a0) nounwind { -; X32-LABEL: test_mm256_broadcast_ss: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vbroadcastss (%eax), %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_broadcast_ss: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vbroadcastss (%eax), %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_broadcast_ss: ; X64: # %bb.0: @@ -290,329 +227,216 @@ define <8 x float> @test_mm256_broadcast_ss(float* %a0) nounwind { } define <8 x float> @test_mm256_castpd_ps(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_castpd_ps: -; X32: # %bb.0: -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castpd_ps: -; X64: # %bb.0: -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castpd_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} %res = bitcast <4 x double> %a0 to <8 x float> ret <8 x float> %res } define <4 x i64> @test_mm256_castpd_si256(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_castpd_si256: -; X32: # %bb.0: -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castpd_si256: -; X64: # %bb.0: -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castpd_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} %res = bitcast <4 x double> %a0 to <4 x i64> ret <4 x i64> %res } define <4 x double> @test_mm256_castpd128_pd256(<2 x double> %a0) nounwind { -; X32-LABEL: test_mm256_castpd128_pd256: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castpd128_pd256: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castpd128_pd256: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <2 x double> %a0, <2 x double> %a0, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ret <4 x double> %res } define <2 x double> @test_mm256_castpd256_pd128(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_castpd256_pd128: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castpd256_pd128: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castpd256_pd128: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x double> %a0, <4 x double> %a0, <2 x i32> <i32 0, i32 1> ret <2 x double> %res } define <4 x double> @test_mm256_castps_pd(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_castps_pd: -; X32: # %bb.0: -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castps_pd: -; X64: # %bb.0: -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castps_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} %res = bitcast <8 x float> %a0 to <4 x double> ret <4 x double> %res } define <4 x i64> @test_mm256_castps_si256(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_castps_si256: -; X32: # %bb.0: -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castps_si256: -; X64: # %bb.0: -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castps_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} %res = bitcast <8 x float> %a0 to <4 x i64> ret <4 x i64> %res } define <8 x float> @test_mm256_castps128_ps256(<4 x float> %a0) nounwind { -; X32-LABEL: test_mm256_castps128_ps256: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castps128_ps256: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castps128_ps256: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x float> %a0, <4 x float> %a0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef> ret <8 x float> %res } define <4 x float> @test_mm256_castps256_ps128(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_castps256_ps128: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castps256_ps128: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castps256_ps128: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <8 x float> %a0, <8 x float> %a0, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ret <4 x float> %res } define <4 x i64> @test_mm256_castsi128_si256(<2 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_castsi128_si256: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castsi128_si256: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castsi128_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <2 x i64> %a0, <2 x i64> %a0, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ret <4 x i64> %res } define <4 x double> @test_mm256_castsi256_pd(<4 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_castsi256_pd: -; X32: # %bb.0: -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castsi256_pd: -; X64: # %bb.0: -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castsi256_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} %res = bitcast <4 x i64> %a0 to <4 x double> ret <4 x double> %res } define <8 x float> @test_mm256_castsi256_ps(<4 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_castsi256_ps: -; X32: # %bb.0: -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castsi256_ps: -; X64: # %bb.0: -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castsi256_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} %res = bitcast <4 x i64> %a0 to <8 x float> ret <8 x float> %res } define <2 x i64> @test_mm256_castsi256_si128(<4 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_castsi256_si128: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_castsi256_si128: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_castsi256_si128: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x i64> %a0, <4 x i64> %a0, <2 x i32> <i32 0, i32 1> ret <2 x i64> %res } define <4 x double> @test_mm256_ceil_pd(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_ceil_pd: -; X32: # %bb.0: -; X32-NEXT: vroundpd $2, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_ceil_pd: -; X64: # %bb.0: -; X64-NEXT: vroundpd $2, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_ceil_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vroundpd $2, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.round.pd.256(<4 x double> %a0, i32 2) ret <4 x double> %res } declare <4 x double> @llvm.x86.avx.round.pd.256(<4 x double>, i32) nounwind readnone define <8 x float> @test_mm256_ceil_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_ceil_ps: -; X32: # %bb.0: -; X32-NEXT: vroundps $2, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_ceil_ps: -; X64: # %bb.0: -; X64-NEXT: vroundps $2, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_ceil_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vroundps $2, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.round.ps.256(<8 x float> %a0, i32 2) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.round.ps.256(<8 x float>, i32) nounwind readnone define <2 x double> @test_mm_cmp_pd(<2 x double> %a0, <2 x double> %a1) nounwind { -; X32-LABEL: test_mm_cmp_pd: -; X32: # %bb.0: -; X32-NEXT: vcmpgepd %xmm1, %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm_cmp_pd: -; X64: # %bb.0: -; X64-NEXT: vcmpgepd %xmm1, %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm_cmp_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vcmpgepd %xmm1, %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 13) ret <2 x double> %res } declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounwind readnone define <4 x double> @test_mm256_cmp_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_cmp_pd: -; X32: # %bb.0: -; X32-NEXT: vcmpgepd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_cmp_pd: -; X64: # %bb.0: -; X64-NEXT: vcmpgepd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_cmp_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vcmpgepd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.cmp.pd.256(<4 x double> %a0, <4 x double> %a1, i8 13) ret <4 x double> %res } declare <4 x double> @llvm.x86.avx.cmp.pd.256(<4 x double>, <4 x double>, i8) nounwind readnone define <4 x float> @test_mm_cmp_ps(<4 x float> %a0, <4 x float> %a1) nounwind { -; X32-LABEL: test_mm_cmp_ps: -; X32: # %bb.0: -; X32-NEXT: vcmpgeps %xmm1, %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm_cmp_ps: -; X64: # %bb.0: -; X64-NEXT: vcmpgeps %xmm1, %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm_cmp_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vcmpgeps %xmm1, %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %a0, <4 x float> %a1, i8 13) ret <4 x float> %res } declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone define <8 x float> @test_mm256_cmp_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_cmp_ps: -; X32: # %bb.0: -; X32-NEXT: vcmpgeps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_cmp_ps: -; X64: # %bb.0: -; X64-NEXT: vcmpgeps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_cmp_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vcmpgeps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 13) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float>, <8 x float>, i8) nounwind readnone define <2 x double> @test_mm_cmp_sd(<2 x double> %a0, <2 x double> %a1) nounwind { -; X32-LABEL: test_mm_cmp_sd: -; X32: # %bb.0: -; X32-NEXT: vcmpgesd %xmm1, %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm_cmp_sd: -; X64: # %bb.0: -; X64-NEXT: vcmpgesd %xmm1, %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm_cmp_sd: +; CHECK: # %bb.0: +; CHECK-NEXT: vcmpgesd %xmm1, %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 13) ret <2 x double> %res } declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone define <4 x float> @test_mm_cmp_ss(<4 x float> %a0, <4 x float> %a1) nounwind { -; X32-LABEL: test_mm_cmp_ss: -; X32: # %bb.0: -; X32-NEXT: vcmpgess %xmm1, %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm_cmp_ss: -; X64: # %bb.0: -; X64-NEXT: vcmpgess %xmm1, %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm_cmp_ss: +; CHECK: # %bb.0: +; CHECK-NEXT: vcmpgess %xmm1, %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a0, <4 x float> %a1, i8 13) ret <4 x float> %res } declare <4 x float> @llvm.x86.sse.cmp.ss(<4 x float>, <4 x float>, i8) nounwind readnone define <4 x double> @test_mm256_cvtepi32_pd(<2 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_cvtepi32_pd: -; X32: # %bb.0: -; X32-NEXT: vcvtdq2pd %xmm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_cvtepi32_pd: -; X64: # %bb.0: -; X64-NEXT: vcvtdq2pd %xmm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_cvtepi32_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vcvtdq2pd %xmm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %arg0 = bitcast <2 x i64> %a0 to <4 x i32> %res = sitofp <4 x i32> %arg0 to <4 x double> ret <4 x double> %res } define <8 x float> @test_mm256_cvtepi32_ps(<4 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_cvtepi32_ps: -; X32: # %bb.0: -; X32-NEXT: vcvtdq2ps %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_cvtepi32_ps: -; X64: # %bb.0: -; X64-NEXT: vcvtdq2ps %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_cvtepi32_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vcvtdq2ps %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %arg0 = bitcast <4 x i64> %a0 to <8 x i32> %res = sitofp <8 x i32> %arg0 to <8 x float> ret <8 x float> %res } define <2 x i64> @test_mm256_cvtpd_epi32(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_cvtpd_epi32: -; X32: # %bb.0: -; X32-NEXT: vcvtpd2dq %ymm0, %xmm0 -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_cvtpd_epi32: -; X64: # %bb.0: -; X64-NEXT: vcvtpd2dq %ymm0, %xmm0 -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_cvtpd_epi32: +; CHECK: # %bb.0: +; CHECK-NEXT: vcvtpd2dq %ymm0, %xmm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %cvt = call <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double> %a0) %res = bitcast <4 x i32> %cvt to <2 x i64> ret <2 x i64> %res @@ -620,32 +444,21 @@ define <2 x i64> @test_mm256_cvtpd_epi32(<4 x double> %a0) nounwind { declare <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double>) nounwind readnone define <4 x float> @test_mm256_cvtpd_ps(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_cvtpd_ps: -; X32: # %bb.0: -; X32-NEXT: vcvtpd2ps %ymm0, %xmm0 -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_cvtpd_ps: -; X64: # %bb.0: -; X64-NEXT: vcvtpd2ps %ymm0, %xmm0 -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_cvtpd_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vcvtpd2ps %ymm0, %xmm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x float> @llvm.x86.avx.cvt.pd2.ps.256(<4 x double> %a0) ret <4 x float> %res } declare <4 x float> @llvm.x86.avx.cvt.pd2.ps.256(<4 x double>) nounwind readnone define <4 x i64> @test_mm256_cvtps_epi32(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_cvtps_epi32: -; X32: # %bb.0: -; X32-NEXT: vcvtps2dq %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_cvtps_epi32: -; X64: # %bb.0: -; X64-NEXT: vcvtps2dq %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_cvtps_epi32: +; CHECK: # %bb.0: +; CHECK-NEXT: vcvtps2dq %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %cvt = call <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float> %a0) %res = bitcast <8 x i32> %cvt to <4 x i64> ret <4 x i64> %res @@ -653,31 +466,20 @@ define <4 x i64> @test_mm256_cvtps_epi32(<8 x float> %a0) nounwind { declare <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float>) nounwind readnone define <4 x double> @test_mm256_cvtps_pd(<4 x float> %a0) nounwind { -; X32-LABEL: test_mm256_cvtps_pd: -; X32: # %bb.0: -; X32-NEXT: vcvtps2pd %xmm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_cvtps_pd: -; X64: # %bb.0: -; X64-NEXT: vcvtps2pd %xmm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_cvtps_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vcvtps2pd %xmm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = fpext <4 x float> %a0 to <4 x double> ret <4 x double> %res } define <2 x i64> @test_mm256_cvttpd_epi32(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_cvttpd_epi32: -; X32: # %bb.0: -; X32-NEXT: vcvttpd2dq %ymm0, %xmm0 -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_cvttpd_epi32: -; X64: # %bb.0: -; X64-NEXT: vcvttpd2dq %ymm0, %xmm0 -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_cvttpd_epi32: +; CHECK: # %bb.0: +; CHECK-NEXT: vcvttpd2dq %ymm0, %xmm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %cvt = call <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double> %a0) %res = bitcast <4 x i32> %cvt to <2 x i64> ret <2 x i64> %res @@ -685,15 +487,10 @@ define <2 x i64> @test_mm256_cvttpd_epi32(<4 x double> %a0) nounwind { declare <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double>) nounwind readnone define <4 x i64> @test_mm256_cvttps_epi32(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_cvttps_epi32: -; X32: # %bb.0: -; X32-NEXT: vcvttps2dq %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_cvttps_epi32: -; X64: # %bb.0: -; X64-NEXT: vcvttps2dq %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_cvttps_epi32: +; CHECK: # %bb.0: +; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %cvt = call <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float> %a0) %res = bitcast <8 x i32> %cvt to <4 x i64> ret <4 x i64> %res @@ -701,64 +498,41 @@ define <4 x i64> @test_mm256_cvttps_epi32(<8 x float> %a0) nounwind { declare <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float>) nounwind readnone define <4 x double> @test_mm256_div_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_div_pd: -; X32: # %bb.0: -; X32-NEXT: vdivpd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_div_pd: -; X64: # %bb.0: -; X64-NEXT: vdivpd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_div_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vdivpd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = fdiv <4 x double> %a0, %a1 ret <4 x double> %res } define <8 x float> @test_mm256_div_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_div_ps: -; X32: # %bb.0: -; X32-NEXT: vdivps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_div_ps: -; X64: # %bb.0: -; X64-NEXT: vdivps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_div_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vdivps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = fdiv <8 x float> %a0, %a1 ret <8 x float> %res } define <8 x float> @test_mm256_dp_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_dp_ps: -; X32: # %bb.0: -; X32-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_dp_ps: -; X64: # %bb.0: -; X64-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_dp_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.dp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 7) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.dp.ps.256(<8 x float>, <8 x float>, i8) nounwind readnone define i32 @test_mm256_extract_epi8(<4 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_extract_epi8: -; X32: # %bb.0: -; X32-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X32-NEXT: vpextrb $15, %xmm0, %eax -; X32-NEXT: movzbl %al, %eax -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_extract_epi8: -; X64: # %bb.0: -; X64-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X64-NEXT: vpextrb $15, %xmm0, %eax -; X64-NEXT: movzbl %al, %eax -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_extract_epi8: +; CHECK: # %bb.0: +; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0 +; CHECK-NEXT: vpextrb $15, %xmm0, %eax +; CHECK-NEXT: movzbl %al, %eax +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %arg0 = bitcast <4 x i64> %a0 to <32 x i8> %ext = extractelement <32 x i8> %arg0, i32 31 %res = zext i8 %ext to i32 @@ -766,21 +540,13 @@ define i32 @test_mm256_extract_epi8(<4 x i64> %a0) nounwind { } define i32 @test_mm256_extract_epi16(<4 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_extract_epi16: -; X32: # %bb.0: -; X32-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X32-NEXT: vpextrw $3, %xmm0, %eax -; X32-NEXT: movzwl %ax, %eax -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_extract_epi16: -; X64: # %bb.0: -; X64-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X64-NEXT: vpextrw $3, %xmm0, %eax -; X64-NEXT: movzwl %ax, %eax -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_extract_epi16: +; CHECK: # %bb.0: +; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0 +; CHECK-NEXT: vpextrw $3, %xmm0, %eax +; CHECK-NEXT: movzwl %ax, %eax +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %arg0 = bitcast <4 x i64> %a0 to <16 x i16> %ext = extractelement <16 x i16> %arg0, i32 11 %res = zext i16 %ext to i32 @@ -788,32 +554,25 @@ define i32 @test_mm256_extract_epi16(<4 x i64> %a0) nounwind { } define i32 @test_mm256_extract_epi32(<4 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_extract_epi32: -; X32: # %bb.0: -; X32-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X32-NEXT: vextractps $1, %xmm0, %eax -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_extract_epi32: -; X64: # %bb.0: -; X64-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X64-NEXT: vextractps $1, %xmm0, %eax -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_extract_epi32: +; CHECK: # %bb.0: +; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0 +; CHECK-NEXT: vextractps $1, %xmm0, %eax +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %arg0 = bitcast <4 x i64> %a0 to <8 x i32> %res = extractelement <8 x i32> %arg0, i32 5 ret i32 %res } define i64 @test_mm256_extract_epi64(<4 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_extract_epi64: -; X32: # %bb.0: -; X32-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X32-NEXT: vextractps $2, %xmm0, %eax -; X32-NEXT: vextractps $3, %xmm0, %edx -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_extract_epi64: +; X86: # %bb.0: +; X86-NEXT: vextractf128 $1, %ymm0, %xmm0 +; X86-NEXT: vextractps $2, %xmm0, %eax +; X86-NEXT: vextractps $3, %xmm0, %edx +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_extract_epi64: ; X64: # %bb.0: @@ -826,148 +585,100 @@ define i64 @test_mm256_extract_epi64(<4 x i64> %a0) nounwind { } define <2 x double> @test_mm256_extractf128_pd(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_extractf128_pd: -; X32: # %bb.0: -; X32-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_extractf128_pd: -; X64: # %bb.0: -; X64-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_extractf128_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x double> %a0, <4 x double> %a0, <2 x i32> <i32 2, i32 3> ret <2 x double> %res } define <4 x float> @test_mm256_extractf128_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_extractf128_ps: -; X32: # %bb.0: -; X32-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_extractf128_ps: -; X64: # %bb.0: -; X64-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_extractf128_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <8 x float> %a0, <8 x float> %a0, <4 x i32> <i32 4, i32 5, i32 6, i32 7> ret <4 x float> %res } define <2 x i64> @test_mm256_extractf128_si256(<4 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_extractf128_si256: -; X32: # %bb.0: -; X32-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_extractf128_si256: -; X64: # %bb.0: -; X64-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_extractf128_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0 +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x i64> %a0, <4 x i64> %a0, <2 x i32> <i32 2, i32 3> ret <2 x i64> %res } define <4 x double> @test_mm256_floor_pd(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_floor_pd: -; X32: # %bb.0: -; X32-NEXT: vroundpd $1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_floor_pd: -; X64: # %bb.0: -; X64-NEXT: vroundpd $1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_floor_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vroundpd $1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.round.pd.256(<4 x double> %a0, i32 1) ret <4 x double> %res } define <8 x float> @test_mm256_floor_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_floor_ps: -; X32: # %bb.0: -; X32-NEXT: vroundps $1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_floor_ps: -; X64: # %bb.0: -; X64-NEXT: vroundps $1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_floor_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vroundps $1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.round.ps.256(<8 x float> %a0, i32 1) ret <8 x float> %res } define <4 x double> @test_mm256_hadd_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_hadd_pd: -; X32: # %bb.0: -; X32-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_hadd_pd: -; X64: # %bb.0: -; X64-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_hadd_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double> %a0, <4 x double> %a1) ret <4 x double> %res } declare <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double>, <4 x double>) nounwind readnone define <8 x float> @test_mm256_hadd_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_hadd_ps: -; X32: # %bb.0: -; X32-NEXT: vhaddps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_hadd_ps: -; X64: # %bb.0: -; X64-NEXT: vhaddps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_hadd_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vhaddps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %a0, <8 x float> %a1) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float>, <8 x float>) nounwind readnone define <4 x double> @test_mm256_hsub_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_hsub_pd: -; X32: # %bb.0: -; X32-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_hsub_pd: -; X64: # %bb.0: -; X64-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_hsub_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double> %a0, <4 x double> %a1) ret <4 x double> %res } declare <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double>, <4 x double>) nounwind readnone define <8 x float> @test_mm256_hsub_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_hsub_ps: -; X32: # %bb.0: -; X32-NEXT: vhsubps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_hsub_ps: -; X64: # %bb.0: -; X64-NEXT: vhsubps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_hsub_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vhsubps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.hsub.ps.256(<8 x float> %a0, <8 x float> %a1) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.hsub.ps.256(<8 x float>, <8 x float>) nounwind readnone define <4 x i64> @test_mm256_insert_epi8(<4 x i64> %a0, i8 %a1) nounwind { -; X32-LABEL: test_mm256_insert_epi8: -; X32: # %bb.0: -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $4, %eax, %xmm0, %xmm1 -; X32-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] -; X32-NEXT: retl +; X86-LABEL: test_mm256_insert_epi8: +; X86: # %bb.0: +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $4, %eax, %xmm0, %xmm1 +; X86-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_insert_epi8: ; X64: # %bb.0: @@ -982,13 +693,13 @@ define <4 x i64> @test_mm256_insert_epi8(<4 x i64> %a0, i8 %a1) nounwind { } define <4 x i64> @test_mm256_insert_epi16(<4 x i64> %a0, i16 %a1) nounwind { -; X32-LABEL: test_mm256_insert_epi16: -; X32: # %bb.0: -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vextractf128 $1, %ymm0, %xmm1 -; X32-NEXT: vpinsrw $6, %eax, %xmm1, %xmm1 -; X32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_insert_epi16: +; X86: # %bb.0: +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vextractf128 $1, %ymm0, %xmm1 +; X86-NEXT: vpinsrw $6, %eax, %xmm1, %xmm1 +; X86-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_insert_epi16: ; X64: # %bb.0: @@ -1003,11 +714,11 @@ define <4 x i64> @test_mm256_insert_epi16(<4 x i64> %a0, i16 %a1) nounwind { } define <4 x i64> @test_mm256_insert_epi32(<4 x i64> %a0, i32 %a1) nounwind { -; X32-LABEL: test_mm256_insert_epi32: -; X32: # %bb.0: -; X32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm1 -; X32-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] -; X32-NEXT: retl +; X86-LABEL: test_mm256_insert_epi32: +; X86: # %bb.0: +; X86-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm1 +; X86-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_insert_epi32: ; X64: # %bb.0: @@ -1021,13 +732,13 @@ define <4 x i64> @test_mm256_insert_epi32(<4 x i64> %a0, i32 %a1) nounwind { } define <4 x i64> @test_mm256_insert_epi64(<4 x i64> %a0, i64 %a1) nounwind { -; X32-LABEL: test_mm256_insert_epi64: -; X32: # %bb.0: -; X32-NEXT: vextractf128 $1, %ymm0, %xmm1 -; X32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_insert_epi64: +; X86: # %bb.0: +; X86-NEXT: vextractf128 $1, %ymm0, %xmm1 +; X86-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_insert_epi64: ; X64: # %bb.0: @@ -1040,60 +751,43 @@ define <4 x i64> @test_mm256_insert_epi64(<4 x i64> %a0, i64 %a1) nounwind { } define <4 x double> @test_mm256_insertf128_pd(<4 x double> %a0, <2 x double> %a1) nounwind { -; X32-LABEL: test_mm256_insertf128_pd: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 -; X32-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_insertf128_pd: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 -; X64-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_insertf128_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 +; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] +; CHECK-NEXT: ret{{[l|q]}} %ext = shufflevector <2 x double> %a1, <2 x double> %a1, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> %res = shufflevector <4 x double> %a0, <4 x double> %ext, <4 x i32> <i32 4, i32 5, i32 2, i32 3> ret <4 x double> %res } define <8 x float> @test_mm256_insertf128_ps(<8 x float> %a0, <4 x float> %a1) nounwind { -; X32-LABEL: test_mm256_insertf128_ps: -; X32: # %bb.0: -; X32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_insertf128_ps: -; X64: # %bb.0: -; X64-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_insertf128_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %ext = shufflevector <4 x float> %a1, <4 x float> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef> %res = shufflevector <8 x float> %a0, <8 x float> %ext, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> ret <8 x float> %res } define <4 x i64> @test_mm256_insertf128_si256(<4 x i64> %a0, <2 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_insertf128_si256: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 -; X32-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_insertf128_si256: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 -; X64-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_insertf128_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 +; CHECK-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7] +; CHECK-NEXT: ret{{[l|q]}} %ext = shufflevector <2 x i64> %a1, <2 x i64> %a1, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> %res = shufflevector <4 x i64> %a0, <4 x i64> %ext, <4 x i32> <i32 4, i32 5, i32 2, i32 3> ret <4 x i64> %res } define <4 x i64> @test_mm256_lddqu_si256(<4 x i64>* %a0) nounwind { -; X32-LABEL: test_mm256_lddqu_si256: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vlddqu (%eax), %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_lddqu_si256: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vlddqu (%eax), %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_lddqu_si256: ; X64: # %bb.0: @@ -1107,11 +801,11 @@ define <4 x i64> @test_mm256_lddqu_si256(<4 x i64>* %a0) nounwind { declare <32 x i8> @llvm.x86.avx.ldu.dq.256(i8*) nounwind readnone define <4 x double> @test_mm256_load_pd(double* %a0) nounwind { -; X32-LABEL: test_mm256_load_pd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovaps (%eax), %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_load_pd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovaps (%eax), %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_load_pd: ; X64: # %bb.0: @@ -1123,11 +817,11 @@ define <4 x double> @test_mm256_load_pd(double* %a0) nounwind { } define <8 x float> @test_mm256_load_ps(float* %a0) nounwind { -; X32-LABEL: test_mm256_load_ps: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovaps (%eax), %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_load_ps: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovaps (%eax), %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_load_ps: ; X64: # %bb.0: @@ -1139,11 +833,11 @@ define <8 x float> @test_mm256_load_ps(float* %a0) nounwind { } define <4 x i64> @test_mm256_load_si256(<4 x i64>* %a0) nounwind { -; X32-LABEL: test_mm256_load_si256: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovaps (%eax), %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_load_si256: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovaps (%eax), %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_load_si256: ; X64: # %bb.0: @@ -1154,11 +848,11 @@ define <4 x i64> @test_mm256_load_si256(<4 x i64>* %a0) nounwind { } define <4 x double> @test_mm256_loadu_pd(double* %a0) nounwind { -; X32-LABEL: test_mm256_loadu_pd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovups (%eax), %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_loadu_pd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovups (%eax), %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_loadu_pd: ; X64: # %bb.0: @@ -1170,11 +864,11 @@ define <4 x double> @test_mm256_loadu_pd(double* %a0) nounwind { } define <8 x float> @test_mm256_loadu_ps(float* %a0) nounwind { -; X32-LABEL: test_mm256_loadu_ps: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovups (%eax), %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_loadu_ps: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovups (%eax), %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_loadu_ps: ; X64: # %bb.0: @@ -1186,11 +880,11 @@ define <8 x float> @test_mm256_loadu_ps(float* %a0) nounwind { } define <4 x i64> @test_mm256_loadu_si256(<4 x i64>* %a0) nounwind { -; X32-LABEL: test_mm256_loadu_si256: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovups (%eax), %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_loadu_si256: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovups (%eax), %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_loadu_si256: ; X64: # %bb.0: @@ -1201,13 +895,13 @@ define <4 x i64> @test_mm256_loadu_si256(<4 x i64>* %a0) nounwind { } define <8 x float> @test_mm256_loadu2_m128(float* %a0, float* %a1) nounwind { -; X32-LABEL: test_mm256_loadu2_m128: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovups (%eax), %xmm0 -; X32-NEXT: vinsertf128 $1, (%ecx), %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_loadu2_m128: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovups (%eax), %xmm0 +; X86-NEXT: vinsertf128 $1, (%ecx), %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_loadu2_m128: ; X64: # %bb.0: @@ -1225,13 +919,13 @@ define <8 x float> @test_mm256_loadu2_m128(float* %a0, float* %a1) nounwind { } define <4 x double> @test_mm256_loadu2_m128d(double* %a0, double* %a1) nounwind { -; X32-LABEL: test_mm256_loadu2_m128d: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovups (%eax), %xmm0 -; X32-NEXT: vinsertf128 $1, (%ecx), %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_loadu2_m128d: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovups (%eax), %xmm0 +; X86-NEXT: vinsertf128 $1, (%ecx), %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_loadu2_m128d: ; X64: # %bb.0: @@ -1249,13 +943,13 @@ define <4 x double> @test_mm256_loadu2_m128d(double* %a0, double* %a1) nounwind } define <4 x i64> @test_mm256_loadu2_m128i(i64* %a0, i64* %a1) nounwind { -; X32-LABEL: test_mm256_loadu2_m128i: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovups (%eax), %xmm0 -; X32-NEXT: vinsertf128 $1, (%ecx), %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_loadu2_m128i: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovups (%eax), %xmm0 +; X86-NEXT: vinsertf128 $1, (%ecx), %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_loadu2_m128i: ; X64: # %bb.0: @@ -1273,11 +967,11 @@ define <4 x i64> @test_mm256_loadu2_m128i(i64* %a0, i64* %a1) nounwind { } define <2 x double> @test_mm_maskload_pd(double* %a0, <2 x i64> %a1) nounwind { -; X32-LABEL: test_mm_maskload_pd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmaskmovpd (%eax), %xmm0, %xmm0 -; X32-NEXT: retl +; X86-LABEL: test_mm_maskload_pd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmaskmovpd (%eax), %xmm0, %xmm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm_maskload_pd: ; X64: # %bb.0: @@ -1290,11 +984,11 @@ define <2 x double> @test_mm_maskload_pd(double* %a0, <2 x i64> %a1) nounwind { declare <2 x double> @llvm.x86.avx.maskload.pd(i8*, <2 x i64>) nounwind readnone define <4 x double> @test_mm256_maskload_pd(double* %a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_maskload_pd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmaskmovpd (%eax), %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_maskload_pd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmaskmovpd (%eax), %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_maskload_pd: ; X64: # %bb.0: @@ -1307,11 +1001,11 @@ define <4 x double> @test_mm256_maskload_pd(double* %a0, <4 x i64> %a1) nounwind declare <4 x double> @llvm.x86.avx.maskload.pd.256(i8*, <4 x i64>) nounwind readnone define <4 x float> @test_mm_maskload_ps(float* %a0, <2 x i64> %a1) nounwind { -; X32-LABEL: test_mm_maskload_ps: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmaskmovps (%eax), %xmm0, %xmm0 -; X32-NEXT: retl +; X86-LABEL: test_mm_maskload_ps: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmaskmovps (%eax), %xmm0, %xmm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm_maskload_ps: ; X64: # %bb.0: @@ -1325,11 +1019,11 @@ define <4 x float> @test_mm_maskload_ps(float* %a0, <2 x i64> %a1) nounwind { declare <4 x float> @llvm.x86.avx.maskload.ps(i8*, <4 x i32>) nounwind readnone define <8 x float> @test_mm256_maskload_ps(float* %a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_maskload_ps: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmaskmovps (%eax), %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_maskload_ps: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmaskmovps (%eax), %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_maskload_ps: ; X64: # %bb.0: @@ -1343,11 +1037,11 @@ define <8 x float> @test_mm256_maskload_ps(float* %a0, <4 x i64> %a1) nounwind { declare <8 x float> @llvm.x86.avx.maskload.ps.256(i8*, <8 x i32>) nounwind readnone define void @test_mm_maskstore_pd(double* %a0, <2 x i64> %a1, <2 x double> %a2) nounwind { -; X32-LABEL: test_mm_maskstore_pd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmaskmovpd %xmm1, %xmm0, (%eax) -; X32-NEXT: retl +; X86-LABEL: test_mm_maskstore_pd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmaskmovpd %xmm1, %xmm0, (%eax) +; X86-NEXT: retl ; ; X64-LABEL: test_mm_maskstore_pd: ; X64: # %bb.0: @@ -1360,12 +1054,12 @@ define void @test_mm_maskstore_pd(double* %a0, <2 x i64> %a1, <2 x double> %a2) declare void @llvm.x86.avx.maskstore.pd(i8*, <2 x i64>, <2 x double>) nounwind readnone define void @test_mm256_maskstore_pd(double* %a0, <4 x i64> %a1, <4 x double> %a2) nounwind { -; X32-LABEL: test_mm256_maskstore_pd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmaskmovpd %ymm1, %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_maskstore_pd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmaskmovpd %ymm1, %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_maskstore_pd: ; X64: # %bb.0: @@ -1379,11 +1073,11 @@ define void @test_mm256_maskstore_pd(double* %a0, <4 x i64> %a1, <4 x double> %a declare void @llvm.x86.avx.maskstore.pd.256(i8*, <4 x i64>, <4 x double>) nounwind readnone define void @test_mm_maskstore_ps(float* %a0, <2 x i64> %a1, <4 x float> %a2) nounwind { -; X32-LABEL: test_mm_maskstore_ps: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmaskmovps %xmm1, %xmm0, (%eax) -; X32-NEXT: retl +; X86-LABEL: test_mm_maskstore_ps: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmaskmovps %xmm1, %xmm0, (%eax) +; X86-NEXT: retl ; ; X64-LABEL: test_mm_maskstore_ps: ; X64: # %bb.0: @@ -1397,12 +1091,12 @@ define void @test_mm_maskstore_ps(float* %a0, <2 x i64> %a1, <4 x float> %a2) no declare void @llvm.x86.avx.maskstore.ps(i8*, <4 x i32>, <4 x float>) nounwind readnone define void @test_mm256_maskstore_ps(float* %a0, <4 x i64> %a1, <8 x float> %a2) nounwind { -; X32-LABEL: test_mm256_maskstore_ps: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmaskmovps %ymm1, %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_maskstore_ps: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmaskmovps %ymm1, %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_maskstore_ps: ; X64: # %bb.0: @@ -1417,179 +1111,117 @@ define void @test_mm256_maskstore_ps(float* %a0, <4 x i64> %a1, <8 x float> %a2) declare void @llvm.x86.avx.maskstore.ps.256(i8*, <8 x i32>, <8 x float>) nounwind readnone define <4 x double> @test_mm256_max_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_max_pd: -; X32: # %bb.0: -; X32-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_max_pd: -; X64: # %bb.0: -; X64-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_max_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %a0, <4 x double> %a1) ret <4 x double> %res } declare <4 x double> @llvm.x86.avx.max.pd.256(<4 x double>, <4 x double>) nounwind readnone define <8 x float> @test_mm256_max_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_max_ps: -; X32: # %bb.0: -; X32-NEXT: vmaxps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_max_ps: -; X64: # %bb.0: -; X64-NEXT: vmaxps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_max_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vmaxps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.max.ps.256(<8 x float> %a0, <8 x float> %a1) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.max.ps.256(<8 x float>, <8 x float>) nounwind readnone define <4 x double> @test_mm256_min_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_min_pd: -; X32: # %bb.0: -; X32-NEXT: vminpd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_min_pd: -; X64: # %bb.0: -; X64-NEXT: vminpd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_min_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vminpd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %a0, <4 x double> %a1) ret <4 x double> %res } declare <4 x double> @llvm.x86.avx.min.pd.256(<4 x double>, <4 x double>) nounwind readnone define <8 x float> @test_mm256_min_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_min_ps: -; X32: # %bb.0: -; X32-NEXT: vminps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_min_ps: -; X64: # %bb.0: -; X64-NEXT: vminps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_min_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vminps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %a0, <8 x float> %a1) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.min.ps.256(<8 x float>, <8 x float>) nounwind readnone define <4 x double> @test_mm256_movedup_pd(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_movedup_pd: -; X32: # %bb.0: -; X32-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_movedup_pd: -; X64: # %bb.0: -; X64-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_movedup_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x double> %a0, <4 x double> %a0, <4 x i32> <i32 0, i32 0, i32 2, i32 2> ret <4 x double> %res } define <8 x float> @test_mm256_movehdup_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_movehdup_ps: -; X32: # %bb.0: -; X32-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_movehdup_ps: -; X64: # %bb.0: -; X64-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_movehdup_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <8 x float> %a0, <8 x float> %a0, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7> ret <8 x float> %res } define <8 x float> @test_mm256_moveldup_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_moveldup_ps: -; X32: # %bb.0: -; X32-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_moveldup_ps: -; X64: # %bb.0: -; X64-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_moveldup_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <8 x float> %a0, <8 x float> %a0, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6> ret <8 x float> %res } define i32 @test_mm256_movemask_pd(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_movemask_pd: -; X32: # %bb.0: -; X32-NEXT: vmovmskpd %ymm0, %eax -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_movemask_pd: -; X64: # %bb.0: -; X64-NEXT: vmovmskpd %ymm0, %eax -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_movemask_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vmovmskpd %ymm0, %eax +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0) ret i32 %res } declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>) nounwind readnone define i32 @test_mm256_movemask_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_movemask_ps: -; X32: # %bb.0: -; X32-NEXT: vmovmskps %ymm0, %eax -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_movemask_ps: -; X64: # %bb.0: -; X64-NEXT: vmovmskps %ymm0, %eax -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_movemask_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vmovmskps %ymm0, %eax +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0) ret i32 %res } declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone define <4 x double> @test_mm256_mul_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_mul_pd: -; X32: # %bb.0: -; X32-NEXT: vmulpd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_mul_pd: -; X64: # %bb.0: -; X64-NEXT: vmulpd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_mul_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vmulpd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = fmul <4 x double> %a0, %a1 ret <4 x double> %res } define <8 x float> @test_mm256_mul_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_mul_ps: -; X32: # %bb.0: -; X32-NEXT: vmulps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_mul_ps: -; X64: # %bb.0: -; X64-NEXT: vmulps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_mul_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vmulps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = fmul <8 x float> %a0, %a1 ret <8 x float> %res } define <4 x double> @test_mm256_or_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_or_pd: -; X32: # %bb.0: -; X32-NEXT: vorps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_or_pd: -; X64: # %bb.0: -; X64-NEXT: vorps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_or_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vorps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %1 = bitcast <4 x double> %a0 to <4 x i64> %2 = bitcast <4 x double> %a1 to <4 x i64> %res = or <4 x i64> %1, %2 @@ -1598,15 +1230,10 @@ define <4 x double> @test_mm256_or_pd(<4 x double> %a0, <4 x double> %a1) nounwi } define <8 x float> @test_mm256_or_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_or_ps: -; X32: # %bb.0: -; X32-NEXT: vorps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_or_ps: -; X64: # %bb.0: -; X64-NEXT: vorps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_or_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vorps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %1 = bitcast <8 x float> %a0 to <8 x i32> %2 = bitcast <8 x float> %a1 to <8 x i32> %res = or <8 x i32> %1, %2 @@ -1615,85 +1242,55 @@ define <8 x float> @test_mm256_or_ps(<8 x float> %a0, <8 x float> %a1) nounwind } define <2 x double> @test_mm_permute_pd(<2 x double> %a0) nounwind { -; X32-LABEL: test_mm_permute_pd: -; X32: # %bb.0: -; X32-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0] -; X32-NEXT: retl -; -; X64-LABEL: test_mm_permute_pd: -; X64: # %bb.0: -; X64-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0] -; X64-NEXT: retq +; CHECK-LABEL: test_mm_permute_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <2 x double> %a0, <2 x double> %a0, <2 x i32> <i32 1, i32 0> ret <2 x double> %res } define <4 x double> @test_mm256_permute_pd(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_permute_pd: -; X32: # %bb.0: -; X32-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,2] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_permute_pd: -; X64: # %bb.0: -; X64-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,2] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_permute_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,2] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x double> %a0, <4 x double> %a0, <4 x i32> <i32 1, i32 0, i32 3, i32 2> ret <4 x double> %res } define <4 x float> @test_mm_permute_ps(<4 x float> %a0) nounwind { -; X32-LABEL: test_mm_permute_ps: -; X32: # %bb.0: -; X32-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] -; X32-NEXT: retl -; -; X64-LABEL: test_mm_permute_ps: -; X64: # %bb.0: -; X64-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] -; X64-NEXT: retq +; CHECK-LABEL: test_mm_permute_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x float> %a0, <4 x float> %a0, <4 x i32> <i32 3, i32 2, i32 1, i32 0> ret <4 x float> %res } define <4 x float> @test2_mm_permute_ps(<4 x float> %a0) nounwind { -; X32-LABEL: test2_mm_permute_ps: -; X32: # %bb.0: -; X32-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,1,2,3] -; X32-NEXT: retl -; -; X64-LABEL: test2_mm_permute_ps: -; X64: # %bb.0: -; X64-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,1,2,3] -; X64-NEXT: retq +; CHECK-LABEL: test2_mm_permute_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,1,2,3] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x float> %a0, <4 x float> %a0, <4 x i32> <i32 2, i32 1, i32 2, i32 3> ret <4 x float> %res } define <8 x float> @test_mm256_permute_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_permute_ps: -; X32: # %bb.0: -; X32-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_permute_ps: -; X64: # %bb.0: -; X64-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_permute_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <8 x float> %a0, <8 x float> %a0, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4> ret <8 x float> %res } define <4 x double> @test_mm256_permute2f128_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_permute2f128_pd: -; X32: # %bb.0: -; X32-NEXT: vperm2f128 {{.*#+}} ymm0 = zero,zero,ymm1[0,1] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_permute2f128_pd: -; X64: # %bb.0: -; X64-NEXT: vperm2f128 {{.*#+}} ymm0 = zero,zero,ymm1[0,1] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_permute2f128_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = zero,zero,ymm1[0,1] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x double> zeroinitializer, <4 x double> %a1, <4 x i32> <i32 0, i32 1, i32 4, i32 5> ret <4 x double> %res } @@ -1701,30 +1298,20 @@ declare <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double>, <4 x double>, ; PR26667 define <8 x float> @test_mm256_permute2f128_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_permute2f128_ps: -; X32: # %bb.0: -; X32-NEXT: vmovaps %ymm1, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_permute2f128_ps: -; X64: # %bb.0: -; X64-NEXT: vmovaps %ymm1, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_permute2f128_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vmovaps %ymm1, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <8 x float> %a1, <8 x float> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15> ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float>, <8 x float>, i8) nounwind readnone define <4 x i64> @test_mm256_permute2f128_si256(<4 x i64> %a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_permute2f128_si256: -; X32: # %bb.0: -; X32-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3,0,1] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_permute2f128_si256: -; X64: # %bb.0: -; X64-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3,0,1] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_permute2f128_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3,0,1] +; CHECK-NEXT: ret{{[l|q]}} %1 = bitcast <4 x i64> %a0 to <8 x i32> %2 = bitcast <4 x i64> %a1 to <8 x i32> %res = shufflevector <8 x i32> %2, <8 x i32> %2, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11> @@ -1734,45 +1321,30 @@ define <4 x i64> @test_mm256_permute2f128_si256(<4 x i64> %a0, <4 x i64> %a1) no declare <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32>, <8 x i32>, i8) nounwind readnone define <2 x double> @test_mm_permutevar_pd(<2 x double> %a0, <2 x i64> %a1) nounwind { -; X32-LABEL: test_mm_permutevar_pd: -; X32: # %bb.0: -; X32-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm_permutevar_pd: -; X64: # %bb.0: -; X64-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm_permutevar_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %a0, <2 x i64> %a1) ret <2 x double> %res } declare <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double>, <2 x i64>) nounwind readnone define <4 x double> @test_mm256_permutevar_pd(<4 x double> %a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_permutevar_pd: -; X32: # %bb.0: -; X32-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_permutevar_pd: -; X64: # %bb.0: -; X64-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_permutevar_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> %a1) ret <4 x double> %res } declare <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>, <4 x i64>) nounwind readnone define <4 x float> @test_mm_permutevar_ps(<4 x float> %a0, <2 x i64> %a1) nounwind { -; X32-LABEL: test_mm_permutevar_ps: -; X32: # %bb.0: -; X32-NEXT: vpermilps %xmm1, %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm_permutevar_ps: -; X64: # %bb.0: -; X64-NEXT: vpermilps %xmm1, %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm_permutevar_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vpermilps %xmm1, %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} %arg1 = bitcast <2 x i64> %a1 to <4 x i32> %res = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> %arg1) ret <4 x float> %res @@ -1780,15 +1352,10 @@ define <4 x float> @test_mm_permutevar_ps(<4 x float> %a0, <2 x i64> %a1) nounwi declare <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>, <4 x i32>) nounwind readnone define <8 x float> @test_mm256_permutevar_ps(<8 x float> %a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_permutevar_ps: -; X32: # %bb.0: -; X32-NEXT: vpermilps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_permutevar_ps: -; X64: # %bb.0: -; X64-NEXT: vpermilps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_permutevar_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vpermilps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %arg1 = bitcast <4 x i64> %a1 to <8 x i32> %res = call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> %arg1) ret <8 x float> %res @@ -1796,132 +1363,112 @@ define <8 x float> @test_mm256_permutevar_ps(<8 x float> %a0, <4 x i64> %a1) nou declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>) nounwind readnone define <8 x float> @test_mm256_rcp_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_rcp_ps: -; X32: # %bb.0: -; X32-NEXT: vrcpps %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_rcp_ps: -; X64: # %bb.0: -; X64-NEXT: vrcpps %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_rcp_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vrcpps %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.rcp.ps.256(<8 x float> %a0) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.rcp.ps.256(<8 x float>) nounwind readnone define <4 x double> @test_mm256_round_pd(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_round_pd: -; X32: # %bb.0: -; X32-NEXT: vroundpd $4, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_round_pd: -; X64: # %bb.0: -; X64-NEXT: vroundpd $4, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_round_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vroundpd $4, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <4 x double> @llvm.x86.avx.round.pd.256(<4 x double> %a0, i32 4) ret <4 x double> %res } define <8 x float> @test_mm256_round_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_round_ps: -; X32: # %bb.0: -; X32-NEXT: vroundps $4, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_round_ps: -; X64: # %bb.0: -; X64-NEXT: vroundps $4, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_round_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vroundps $4, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.round.ps.256(<8 x float> %a0, i32 4) ret <8 x float> %res } define <8 x float> @test_mm256_rsqrt_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_rsqrt_ps: -; X32: # %bb.0: -; X32-NEXT: vrsqrtps %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_rsqrt_ps: -; X64: # %bb.0: -; X64-NEXT: vrsqrtps %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_rsqrt_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vrsqrtps %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = call <8 x float> @llvm.x86.avx.rsqrt.ps.256(<8 x float> %a0) ret <8 x float> %res } declare <8 x float> @llvm.x86.avx.rsqrt.ps.256(<8 x float>) nounwind readnone define <4 x i64> @test_mm256_set_epi8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15, i8 %a16, i8 %a17, i8 %a18, i8 %a19, i8 %a20, i8 %a21, i8 %a22, i8 %a23, i8 %a24, i8 %a25, i8 %a26, i8 %a27, i8 %a28, i8 %a29, i8 %a30, i8 %a31) nounwind { -; X32-LABEL: test_mm256_set_epi8: -; X32: # %bb.0: -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovd %ecx, %xmm0 -; X32-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovd %ecx, %xmm1 -; X32-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $10, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $11, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $13, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $14, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set_epi8: +; X86: # %bb.0: +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovd %ecx, %xmm0 +; X86-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovd %ecx, %xmm1 +; X86-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $10, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $11, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $13, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $14, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set_epi8: ; X64: # %bb.0: @@ -2028,42 +1575,42 @@ define <4 x i64> @test_mm256_set_epi8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 } define <4 x i64> @test_mm256_set_epi16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7, i16 %a8, i16 %a9, i16 %a10, i16 %a11, i16 %a12, i16 %a13, i16 %a14, i16 %a15) nounwind { -; X32-LABEL: test_mm256_set_epi16: -; X32: # %bb.0: -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovd %eax, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $3, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $5, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovd %eax, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $1, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $2, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $3, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $4, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $5, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $6, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $7, %eax, %xmm1, %xmm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set_epi16: +; X86: # %bb.0: +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovd %eax, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $3, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $5, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovd %eax, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $1, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $2, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $3, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $4, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $5, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $6, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $7, %eax, %xmm1, %xmm1 +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set_epi16: ; X64: # %bb.0: @@ -2116,18 +1663,18 @@ define <4 x i64> @test_mm256_set_epi16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 % } define <4 x i64> @test_mm256_set_epi32(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind { -; X32-LABEL: test_mm256_set_epi32: -; X32: # %bb.0: -; X32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero -; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set_epi32: +; X86: # %bb.0: +; X86-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set_epi32: ; X64: # %bb.0: @@ -2154,18 +1701,18 @@ define <4 x i64> @test_mm256_set_epi32(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 % } define <4 x i64> @test_mm256_set_epi64x(i64 %a0, i64 %a1, i64 %a2, i64 %a3) nounwind { -; X32-LABEL: test_mm256_set_epi64x: -; X32: # %bb.0: -; X32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero -; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set_epi64x: +; X86: # %bb.0: +; X86-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set_epi64x: ; X64: # %bb.0: @@ -2185,33 +1732,21 @@ define <4 x i64> @test_mm256_set_epi64x(i64 %a0, i64 %a1, i64 %a2, i64 %a3) noun } define <8 x float> @test_mm256_set_m128(<4 x float> %a0, <4 x float> %a1) nounwind { -; X32-LABEL: test_mm256_set_m128: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_set_m128: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 -; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_set_m128: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 +; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x float> %a1, <4 x float> %a0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ret <8 x float> %res } define <4 x double> @test_mm256_set_m128d(<2 x double> %a0, <2 x double> %a1) nounwind { -; X32-LABEL: test_mm256_set_m128d: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_set_m128d: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 -; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_set_m128d: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 +; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %arg0 = bitcast <2 x double> %a0 to <4 x float> %arg1 = bitcast <2 x double> %a1 to <4 x float> %res = shufflevector <4 x float> %arg1, <4 x float> %arg0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> @@ -2220,17 +1755,11 @@ define <4 x double> @test_mm256_set_m128d(<2 x double> %a0, <2 x double> %a1) no } define <4 x i64> @test_mm256_set_m128i(<2 x i64> %a0, <2 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_set_m128i: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_set_m128i: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 -; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_set_m128i: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm1 killed $xmm1 def $ymm1 +; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %arg0 = bitcast <2 x i64> %a0 to <4 x float> %arg1 = bitcast <2 x i64> %a1 to <4 x float> %res = shufflevector <4 x float> %arg1, <4 x float> %arg0, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> @@ -2239,16 +1768,16 @@ define <4 x i64> @test_mm256_set_m128i(<2 x i64> %a0, <2 x i64> %a1) nounwind { } define <4 x double> @test_mm256_set_pd(double %a0, double %a1, double %a2, double %a3) nounwind { -; X32-LABEL: test_mm256_set_pd: -; X32: # %bb.0: -; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero -; X32-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero -; X32-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero -; X32-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero -; X32-NEXT: vmovlhps {{.*#+}} xmm2 = xmm2[0],xmm3[0] -; X32-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] -; X32-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set_pd: +; X86: # %bb.0: +; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero +; X86-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero +; X86-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero +; X86-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero +; X86-NEXT: vmovlhps {{.*#+}} xmm2 = xmm2[0],xmm3[0] +; X86-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; X86-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set_pd: ; X64: # %bb.0: @@ -2264,24 +1793,24 @@ define <4 x double> @test_mm256_set_pd(double %a0, double %a1, double %a2, doubl } define <8 x float> @test_mm256_set_ps(float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7) nounwind { -; X32-LABEL: test_mm256_set_ps: -; X32: # %bb.0: -; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm4 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm6 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm7 = mem[0],zero,zero,zero -; X32-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[2,3] -; X32-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0,1],xmm6[0],xmm4[3] -; X32-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0,1,2],xmm7[0] -; X32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] -; X32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3] -; X32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm3[0] -; X32-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set_ps: +; X86: # %bb.0: +; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm4 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm6 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm7 = mem[0],zero,zero,zero +; X86-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[2,3] +; X86-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0,1],xmm6[0],xmm4[3] +; X86-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0,1,2],xmm7[0] +; X86-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] +; X86-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3] +; X86-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm3[0] +; X86-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set_ps: ; X64: # %bb.0: @@ -2305,14 +1834,14 @@ define <8 x float> @test_mm256_set_ps(float %a0, float %a1, float %a2, float %a3 } define <4 x i64> @test_mm256_set1_epi8(i8 %a0) nounwind { -; X32-LABEL: test_mm256_set1_epi8: -; X32: # %bb.0: -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovd %eax, %xmm0 -; X32-NEXT: vpxor %xmm1, %xmm1, %xmm1 -; X32-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set1_epi8: +; X86: # %bb.0: +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovd %eax, %xmm0 +; X86-NEXT: vpxor %xmm1, %xmm1, %xmm1 +; X86-NEXT: vpshufb %xmm1, %xmm0, %xmm0 +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set1_epi8: ; X64: # %bb.0: @@ -2359,14 +1888,14 @@ define <4 x i64> @test_mm256_set1_epi8(i8 %a0) nounwind { } define <4 x i64> @test_mm256_set1_epi16(i16 %a0) nounwind { -; X32-LABEL: test_mm256_set1_epi16: -; X32: # %bb.0: -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovd %eax, %xmm0 -; X32-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7] -; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0] -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set1_epi16: +; X86: # %bb.0: +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovd %eax, %xmm0 +; X86-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7] +; X86-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0] +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set1_epi16: ; X64: # %bb.0: @@ -2396,12 +1925,12 @@ define <4 x i64> @test_mm256_set1_epi16(i16 %a0) nounwind { } define <4 x i64> @test_mm256_set1_epi32(i32 %a0) nounwind { -; X32-LABEL: test_mm256_set1_epi32: -; X32: # %bb.0: -; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set1_epi32: +; X86: # %bb.0: +; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X86-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set1_epi32: ; X64: # %bb.0: @@ -2422,16 +1951,16 @@ define <4 x i64> @test_mm256_set1_epi32(i32 %a0) nounwind { } define <4 x i64> @test_mm256_set1_epi64x(i64 %a0) nounwind { -; X32-LABEL: test_mm256_set1_epi64x: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovd %ecx, %xmm0 -; X32-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 -; X32-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 -; X32-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set1_epi64x: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovd %ecx, %xmm0 +; X86-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 +; X86-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 +; X86-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set1_epi64x: ; X64: # %bb.0: @@ -2447,12 +1976,12 @@ define <4 x i64> @test_mm256_set1_epi64x(i64 %a0) nounwind { } define <4 x double> @test_mm256_set1_pd(double %a0) nounwind { -; X32-LABEL: test_mm256_set1_pd: -; X32: # %bb.0: -; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero -; X32-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set1_pd: +; X86: # %bb.0: +; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero +; X86-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0] +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set1_pd: ; X64: # %bb.0: @@ -2467,12 +1996,12 @@ define <4 x double> @test_mm256_set1_pd(double %a0) nounwind { } define <8 x float> @test_mm256_set1_ps(float %a0) nounwind { -; X32-LABEL: test_mm256_set1_ps: -; X32: # %bb.0: -; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_set1_ps: +; X86: # %bb.0: +; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X86-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_set1_ps: ; X64: # %bb.0: @@ -2491,74 +2020,74 @@ define <8 x float> @test_mm256_set1_ps(float %a0) nounwind { } define <4 x i64> @test_mm256_setr_epi8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15, i8 %a16, i8 %a17, i8 %a18, i8 %a19, i8 %a20, i8 %a21, i8 %a22, i8 %a23, i8 %a24, i8 %a25, i8 %a26, i8 %a27, i8 %a28, i8 %a29, i8 %a30, i8 %a31) nounwind { -; X32-LABEL: test_mm256_setr_epi8: -; X32: # %bb.0: -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovd %ecx, %xmm0 -; X32-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovd %ecx, %xmm1 -; X32-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $10, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $11, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $13, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $14, %eax, %xmm1, %xmm1 -; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_setr_epi8: +; X86: # %bb.0: +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovd %ecx, %xmm0 +; X86-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovd %ecx, %xmm1 +; X86-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $10, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $11, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $13, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $14, %eax, %xmm1, %xmm1 +; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_setr_epi8: ; X64: # %bb.0: @@ -2665,42 +2194,42 @@ define <4 x i64> @test_mm256_setr_epi8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i } define <4 x i64> @test_mm256_setr_epi16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7, i16 %a8, i16 %a9, i16 %a10, i16 %a11, i16 %a12, i16 %a13, i16 %a14, i16 %a15) nounwind { -; X32-LABEL: test_mm256_setr_epi16: -; X32: # %bb.0: -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovd %eax, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $3, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $5, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovd %eax, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $1, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $2, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $3, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $4, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $5, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $6, %eax, %xmm1, %xmm1 -; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vpinsrw $7, %eax, %xmm1, %xmm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_setr_epi16: +; X86: # %bb.0: +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovd %eax, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $3, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $5, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovd %eax, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $1, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $2, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $3, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $4, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $5, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $6, %eax, %xmm1, %xmm1 +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vpinsrw $7, %eax, %xmm1, %xmm1 +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_setr_epi16: ; X64: # %bb.0: @@ -2753,18 +2282,18 @@ define <4 x i64> @test_mm256_setr_epi16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 } define <4 x i64> @test_mm256_setr_epi32(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind { -; X32-LABEL: test_mm256_setr_epi32: -; X32: # %bb.0: -; X32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero -; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_setr_epi32: +; X86: # %bb.0: +; X86-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_setr_epi32: ; X64: # %bb.0: @@ -2791,18 +2320,18 @@ define <4 x i64> @test_mm256_setr_epi32(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 } define <4 x i64> @test_mm256_setr_epi64x(i64 %a0, i64 %a1, i64 %a2, i64 %a3) nounwind { -; X32-LABEL: test_mm256_setr_epi64x: -; X32: # %bb.0: -; X32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0 -; X32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero -; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1 -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_setr_epi64x: +; X86: # %bb.0: +; X86-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0 +; X86-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X86-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vpinsrd $2, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vpinsrd $3, {{[0-9]+}}(%esp), %xmm1, %xmm1 +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_setr_epi64x: ; X64: # %bb.0: @@ -2822,33 +2351,21 @@ define <4 x i64> @test_mm256_setr_epi64x(i64 %a0, i64 %a1, i64 %a2, i64 %a3) nou } define <8 x float> @test_mm256_setr_m128(<4 x float> %a0, <4 x float> %a1) nounwind { -; X32-LABEL: test_mm256_setr_m128: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_setr_m128: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X64-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_setr_m128: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 +; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x float> %a0, <4 x float> %a1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ret <8 x float> %res } define <4 x double> @test_mm256_setr_m128d(<2 x double> %a0, <2 x double> %a1) nounwind { -; X32-LABEL: test_mm256_setr_m128d: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_setr_m128d: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X64-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_setr_m128d: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 +; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %arg0 = bitcast <2 x double> %a0 to <4 x float> %arg1 = bitcast <2 x double> %a1 to <4 x float> %res = shufflevector <4 x float> %arg0, <4 x float> %arg1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> @@ -2857,17 +2374,11 @@ define <4 x double> @test_mm256_setr_m128d(<2 x double> %a0, <2 x double> %a1) n } define <4 x i64> @test_mm256_setr_m128i(<2 x i64> %a0, <2 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_setr_m128i: -; X32: # %bb.0: -; X32-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X32-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_setr_m128i: -; X64: # %bb.0: -; X64-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 -; X64-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_setr_m128i: +; CHECK: # %bb.0: +; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 +; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %arg0 = bitcast <2 x i64> %a0 to <4 x float> %arg1 = bitcast <2 x i64> %a1 to <4 x float> %res = shufflevector <4 x float> %arg0, <4 x float> %arg1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> @@ -2876,16 +2387,16 @@ define <4 x i64> @test_mm256_setr_m128i(<2 x i64> %a0, <2 x i64> %a1) nounwind { } define <4 x double> @test_mm256_setr_pd(double %a0, double %a1, double %a2, double %a3) nounwind { -; X32-LABEL: test_mm256_setr_pd: -; X32: # %bb.0: -; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero -; X32-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero -; X32-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero -; X32-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero -; X32-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] -; X32-NEXT: vmovlhps {{.*#+}} xmm1 = xmm3[0],xmm2[0] -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_setr_pd: +; X86: # %bb.0: +; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero +; X86-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero +; X86-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero +; X86-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero +; X86-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] +; X86-NEXT: vmovlhps {{.*#+}} xmm1 = xmm3[0],xmm2[0] +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_setr_pd: ; X64: # %bb.0: @@ -2901,24 +2412,24 @@ define <4 x double> @test_mm256_setr_pd(double %a0, double %a1, double %a2, doub } define <8 x float> @test_mm256_setr_ps(float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7) nounwind { -; X32-LABEL: test_mm256_setr_ps: -; X32: # %bb.0: -; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm4 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm6 = mem[0],zero,zero,zero -; X32-NEXT: vmovss {{.*#+}} xmm7 = mem[0],zero,zero,zero -; X32-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3] -; X32-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3] -; X32-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] -; X32-NEXT: vinsertps {{.*#+}} xmm1 = xmm7[0],xmm6[0],xmm7[2,3] -; X32-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm5[0],xmm1[3] -; X32-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm4[0] -; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 -; X32-NEXT: retl +; X86-LABEL: test_mm256_setr_ps: +; X86: # %bb.0: +; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm4 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm6 = mem[0],zero,zero,zero +; X86-NEXT: vmovss {{.*#+}} xmm7 = mem[0],zero,zero,zero +; X86-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3] +; X86-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3] +; X86-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] +; X86-NEXT: vinsertps {{.*#+}} xmm1 = xmm7[0],xmm6[0],xmm7[2,3] +; X86-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm5[0],xmm1[3] +; X86-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm4[0] +; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_setr_ps: ; X64: # %bb.0: @@ -2942,82 +2453,52 @@ define <8 x float> @test_mm256_setr_ps(float %a0, float %a1, float %a2, float %a } define <4 x double> @test_mm256_setzero_pd() nounwind { -; X32-LABEL: test_mm256_setzero_pd: -; X32: # %bb.0: -; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_setzero_pd: -; X64: # %bb.0: -; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_setzero_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} ret <4 x double> zeroinitializer } define <8 x float> @test_mm256_setzero_ps() nounwind { -; X32-LABEL: test_mm256_setzero_ps: -; X32: # %bb.0: -; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_setzero_ps: -; X64: # %bb.0: -; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_setzero_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} ret <8 x float> zeroinitializer } define <4 x i64> @test_mm256_setzero_si256() nounwind { -; X32-LABEL: test_mm256_setzero_si256: -; X32: # %bb.0: -; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_setzero_si256: -; X64: # %bb.0: -; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_setzero_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} ret <4 x i64> zeroinitializer } define <4 x double> @test_mm256_shuffle_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_shuffle_pd: -; X32: # %bb.0: -; X32-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_shuffle_pd: -; X64: # %bb.0: -; X64-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_shuffle_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 0, i32 4, i32 2, i32 6> ret <4 x double> %res } define <8 x float> @test_mm256_shuffle_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_shuffle_ps: -; X32: # %bb.0: -; X32-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0],ymm1[0,0],ymm0[4,4],ymm1[4,4] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_shuffle_ps: -; X64: # %bb.0: -; X64-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0],ymm1[0,0],ymm0[4,4],ymm1[4,4] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_shuffle_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,0],ymm1[0,0],ymm0[4,4],ymm1[4,4] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 0, i32 8, i32 8, i32 4, i32 4, i32 12, i32 12> ret <8 x float> %res } define <4 x double> @test_mm256_sqrt_pd(<4 x double> %a0) nounwind { -; X32-LABEL: test_mm256_sqrt_pd: -; X32: # %bb.0: -; X32-NEXT: vsqrtpd %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_sqrt_pd: -; X64: # %bb.0: -; X64-NEXT: vsqrtpd %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_sqrt_pd: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsqrtpd %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} entry: %0 = tail call <4 x double> @llvm.sqrt.v4f64(<4 x double> %a0) #2 ret <4 x double> %0 @@ -3026,15 +2507,10 @@ entry: declare <4 x double> @llvm.sqrt.v4f64(<4 x double>) #1 define <8 x float> @test_mm256_sqrt_ps(<8 x float> %a0) nounwind { -; X32-LABEL: test_mm256_sqrt_ps: -; X32: # %bb.0: -; X32-NEXT: vsqrtps %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_sqrt_ps: -; X64: # %bb.0: -; X64-NEXT: vsqrtps %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_sqrt_ps: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsqrtps %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} entry: %0 = tail call <8 x float> @llvm.sqrt.v8f32(<8 x float> %a0) #2 ret <8 x float> %0 @@ -3043,12 +2519,12 @@ entry: declare <8 x float> @llvm.sqrt.v8f32(<8 x float>) #1 define void @test_mm256_store_pd(double* %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_store_pd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovaps %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_store_pd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovaps %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_store_pd: ; X64: # %bb.0: @@ -3061,12 +2537,12 @@ define void @test_mm256_store_pd(double* %a0, <4 x double> %a1) nounwind { } define void @test_mm256_store_ps(float* %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_store_ps: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovaps %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_store_ps: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovaps %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_store_ps: ; X64: # %bb.0: @@ -3079,12 +2555,12 @@ define void @test_mm256_store_ps(float* %a0, <8 x float> %a1) nounwind { } define void @test_mm256_store_si256(<4 x i64>* %a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_store_si256: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovaps %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_store_si256: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovaps %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_store_si256: ; X64: # %bb.0: @@ -3096,12 +2572,12 @@ define void @test_mm256_store_si256(<4 x i64>* %a0, <4 x i64> %a1) nounwind { } define void @test_mm256_storeu_pd(double* %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_storeu_pd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovups %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_storeu_pd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovups %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_storeu_pd: ; X64: # %bb.0: @@ -3114,12 +2590,12 @@ define void @test_mm256_storeu_pd(double* %a0, <4 x double> %a1) nounwind { } define void @test_mm256_storeu_ps(float* %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_storeu_ps: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovups %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_storeu_ps: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovups %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_storeu_ps: ; X64: # %bb.0: @@ -3132,12 +2608,12 @@ define void @test_mm256_storeu_ps(float* %a0, <8 x float> %a1) nounwind { } define void @test_mm256_storeu_si256(<4 x i64>* %a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_storeu_si256: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovups %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_storeu_si256: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovups %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_storeu_si256: ; X64: # %bb.0: @@ -3149,15 +2625,15 @@ define void @test_mm256_storeu_si256(<4 x i64>* %a0, <4 x i64> %a1) nounwind { } define void @test_mm256_storeu2_m128(float* %a0, float* %a1, <8 x float> %a2) nounwind { -; X32-LABEL: test_mm256_storeu2_m128: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovups %xmm0, (%ecx) -; X32-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X32-NEXT: vmovups %xmm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_storeu2_m128: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovups %xmm0, (%ecx) +; X86-NEXT: vextractf128 $1, %ymm0, %xmm0 +; X86-NEXT: vmovups %xmm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_storeu2_m128: ; X64: # %bb.0: @@ -3176,15 +2652,15 @@ define void @test_mm256_storeu2_m128(float* %a0, float* %a1, <8 x float> %a2) no } define void @test_mm256_storeu2_m128d(double* %a0, double* %a1, <4 x double> %a2) nounwind { -; X32-LABEL: test_mm256_storeu2_m128d: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovups %xmm0, (%ecx) -; X32-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X32-NEXT: vmovups %xmm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_storeu2_m128d: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovups %xmm0, (%ecx) +; X86-NEXT: vextractf128 $1, %ymm0, %xmm0 +; X86-NEXT: vmovups %xmm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_storeu2_m128d: ; X64: # %bb.0: @@ -3203,15 +2679,15 @@ define void @test_mm256_storeu2_m128d(double* %a0, double* %a1, <4 x double> %a2 } define void @test_mm256_storeu2_m128i(<2 x i64>* %a0, <2 x i64>* %a1, <4 x i64> %a2) nounwind { -; X32-LABEL: test_mm256_storeu2_m128i: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovups %xmm0, (%ecx) -; X32-NEXT: vextractf128 $1, %ymm0, %xmm0 -; X32-NEXT: vmovups %xmm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_storeu2_m128i: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: vmovups %xmm0, (%ecx) +; X86-NEXT: vextractf128 $1, %ymm0, %xmm0 +; X86-NEXT: vmovups %xmm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_storeu2_m128i: ; X64: # %bb.0: @@ -3230,12 +2706,12 @@ define void @test_mm256_storeu2_m128i(<2 x i64>* %a0, <2 x i64>* %a1, <4 x i64> } define void @test_mm256_stream_pd(double *%a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_stream_pd: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovntps %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_stream_pd: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovntps %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_stream_pd: ; X64: # %bb.0: @@ -3248,12 +2724,12 @@ define void @test_mm256_stream_pd(double *%a0, <4 x double> %a1) nounwind { } define void @test_mm256_stream_ps(float *%a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_stream_ps: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovntps %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_stream_ps: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovntps %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_stream_ps: ; X64: # %bb.0: @@ -3266,12 +2742,12 @@ define void @test_mm256_stream_ps(float *%a0, <8 x float> %a1) nounwind { } define void @test_mm256_stream_si256(<4 x i64> *%a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_stream_si256: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: vmovntps %ymm0, (%eax) -; X32-NEXT: vzeroupper -; X32-NEXT: retl +; X86-LABEL: test_mm256_stream_si256: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovntps %ymm0, (%eax) +; X86-NEXT: vzeroupper +; X86-NEXT: retl ; ; X64-LABEL: test_mm256_stream_si256: ; X64: # %bb.0: @@ -3283,446 +2759,281 @@ define void @test_mm256_stream_si256(<4 x i64> *%a0, <4 x i64> %a1) nounwind { } define <4 x double> @test_mm256_sub_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_sub_pd: -; X32: # %bb.0: -; X32-NEXT: vsubpd %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_sub_pd: -; X64: # %bb.0: -; X64-NEXT: vsubpd %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_sub_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vsubpd %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = fsub <4 x double> %a0, %a1 ret <4 x double> %res } define <8 x float> @test_mm256_sub_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_sub_ps: -; X32: # %bb.0: -; X32-NEXT: vsubps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_sub_ps: -; X64: # %bb.0: -; X64-NEXT: vsubps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_sub_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vsubps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %res = fsub <8 x float> %a0, %a1 ret <8 x float> %res } define i32 @test_mm_testc_pd(<2 x double> %a0, <2 x double> %a1) nounwind { -; X32-LABEL: test_mm_testc_pd: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestpd %xmm1, %xmm0 -; X32-NEXT: setb %al -; X32-NEXT: retl -; -; X64-LABEL: test_mm_testc_pd: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestpd %xmm1, %xmm0 -; X64-NEXT: setb %al -; X64-NEXT: retq +; CHECK-LABEL: test_mm_testc_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestpd %xmm1, %xmm0 +; CHECK-NEXT: setb %al +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestc.pd(<2 x double> %a0, <2 x double> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestc.pd(<2 x double>, <2 x double>) nounwind readnone define i32 @test_mm256_testc_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_testc_pd: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestpd %ymm1, %ymm0 -; X32-NEXT: setb %al -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_testc_pd: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestpd %ymm1, %ymm0 -; X64-NEXT: setb %al -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_testc_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestpd %ymm1, %ymm0 +; CHECK-NEXT: setb %al +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestc.pd.256(<4 x double> %a0, <4 x double> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestc.pd.256(<4 x double>, <4 x double>) nounwind readnone define i32 @test_mm_testc_ps(<4 x float> %a0, <4 x float> %a1) nounwind { -; X32-LABEL: test_mm_testc_ps: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestps %xmm1, %xmm0 -; X32-NEXT: setb %al -; X32-NEXT: retl -; -; X64-LABEL: test_mm_testc_ps: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestps %xmm1, %xmm0 -; X64-NEXT: setb %al -; X64-NEXT: retq +; CHECK-LABEL: test_mm_testc_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestps %xmm1, %xmm0 +; CHECK-NEXT: setb %al +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestc.ps(<4 x float> %a0, <4 x float> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestc.ps(<4 x float>, <4 x float>) nounwind readnone define i32 @test_mm256_testc_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_testc_ps: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestps %ymm1, %ymm0 -; X32-NEXT: setb %al -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_testc_ps: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestps %ymm1, %ymm0 -; X64-NEXT: setb %al -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_testc_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestps %ymm1, %ymm0 +; CHECK-NEXT: setb %al +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestc.ps.256(<8 x float> %a0, <8 x float> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestc.ps.256(<8 x float>, <8 x float>) nounwind readnone define i32 @test_mm256_testc_si256(<4 x i64> %a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_testc_si256: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vptest %ymm1, %ymm0 -; X32-NEXT: setb %al -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_testc_si256: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vptest %ymm1, %ymm0 -; X64-NEXT: setb %al -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_testc_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vptest %ymm1, %ymm0 +; CHECK-NEXT: setb %al +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.ptestc.256(<4 x i64> %a0, <4 x i64> %a1) ret i32 %res } declare i32 @llvm.x86.avx.ptestc.256(<4 x i64>, <4 x i64>) nounwind readnone define i32 @test_mm_testnzc_pd(<2 x double> %a0, <2 x double> %a1) nounwind { -; X32-LABEL: test_mm_testnzc_pd: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestpd %xmm1, %xmm0 -; X32-NEXT: seta %al -; X32-NEXT: retl -; -; X64-LABEL: test_mm_testnzc_pd: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestpd %xmm1, %xmm0 -; X64-NEXT: seta %al -; X64-NEXT: retq +; CHECK-LABEL: test_mm_testnzc_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestpd %xmm1, %xmm0 +; CHECK-NEXT: seta %al +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestnzc.pd(<2 x double> %a0, <2 x double> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestnzc.pd(<2 x double>, <2 x double>) nounwind readnone define i32 @test_mm256_testnzc_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_testnzc_pd: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestpd %ymm1, %ymm0 -; X32-NEXT: seta %al -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_testnzc_pd: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestpd %ymm1, %ymm0 -; X64-NEXT: seta %al -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_testnzc_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestpd %ymm1, %ymm0 +; CHECK-NEXT: seta %al +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestnzc.pd.256(<4 x double> %a0, <4 x double> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestnzc.pd.256(<4 x double>, <4 x double>) nounwind readnone define i32 @test_mm_testnzc_ps(<4 x float> %a0, <4 x float> %a1) nounwind { -; X32-LABEL: test_mm_testnzc_ps: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestps %xmm1, %xmm0 -; X32-NEXT: seta %al -; X32-NEXT: retl -; -; X64-LABEL: test_mm_testnzc_ps: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestps %xmm1, %xmm0 -; X64-NEXT: seta %al -; X64-NEXT: retq +; CHECK-LABEL: test_mm_testnzc_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestps %xmm1, %xmm0 +; CHECK-NEXT: seta %al +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestnzc.ps(<4 x float> %a0, <4 x float> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestnzc.ps(<4 x float>, <4 x float>) nounwind readnone define i32 @test_mm256_testnzc_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_testnzc_ps: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestps %ymm1, %ymm0 -; X32-NEXT: seta %al -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_testnzc_ps: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestps %ymm1, %ymm0 -; X64-NEXT: seta %al -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_testnzc_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestps %ymm1, %ymm0 +; CHECK-NEXT: seta %al +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestnzc.ps.256(<8 x float> %a0, <8 x float> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestnzc.ps.256(<8 x float>, <8 x float>) nounwind readnone define i32 @test_mm256_testnzc_si256(<4 x i64> %a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_testnzc_si256: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vptest %ymm1, %ymm0 -; X32-NEXT: seta %al -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_testnzc_si256: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vptest %ymm1, %ymm0 -; X64-NEXT: seta %al -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_testnzc_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vptest %ymm1, %ymm0 +; CHECK-NEXT: seta %al +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.ptestnzc.256(<4 x i64> %a0, <4 x i64> %a1) ret i32 %res } declare i32 @llvm.x86.avx.ptestnzc.256(<4 x i64>, <4 x i64>) nounwind readnone define i32 @test_mm_testz_pd(<2 x double> %a0, <2 x double> %a1) nounwind { -; X32-LABEL: test_mm_testz_pd: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestpd %xmm1, %xmm0 -; X32-NEXT: sete %al -; X32-NEXT: retl -; -; X64-LABEL: test_mm_testz_pd: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestpd %xmm1, %xmm0 -; X64-NEXT: sete %al -; X64-NEXT: retq +; CHECK-LABEL: test_mm_testz_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestpd %xmm1, %xmm0 +; CHECK-NEXT: sete %al +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestz.pd(<2 x double> %a0, <2 x double> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestz.pd(<2 x double>, <2 x double>) nounwind readnone define i32 @test_mm256_testz_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_testz_pd: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestpd %ymm1, %ymm0 -; X32-NEXT: sete %al -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_testz_pd: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestpd %ymm1, %ymm0 -; X64-NEXT: sete %al -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_testz_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestpd %ymm1, %ymm0 +; CHECK-NEXT: sete %al +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestz.pd.256(<4 x double> %a0, <4 x double> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestz.pd.256(<4 x double>, <4 x double>) nounwind readnone define i32 @test_mm_testz_ps(<4 x float> %a0, <4 x float> %a1) nounwind { -; X32-LABEL: test_mm_testz_ps: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestps %xmm1, %xmm0 -; X32-NEXT: sete %al -; X32-NEXT: retl -; -; X64-LABEL: test_mm_testz_ps: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestps %xmm1, %xmm0 -; X64-NEXT: sete %al -; X64-NEXT: retq +; CHECK-LABEL: test_mm_testz_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestps %xmm1, %xmm0 +; CHECK-NEXT: sete %al +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestz.ps(<4 x float> %a0, <4 x float> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestz.ps(<4 x float>, <4 x float>) nounwind readnone define i32 @test_mm256_testz_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_testz_ps: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vtestps %ymm1, %ymm0 -; X32-NEXT: sete %al -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_testz_ps: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vtestps %ymm1, %ymm0 -; X64-NEXT: sete %al -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_testz_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vtestps %ymm1, %ymm0 +; CHECK-NEXT: sete %al +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.vtestz.ps.256(<8 x float> %a0, <8 x float> %a1) ret i32 %res } declare i32 @llvm.x86.avx.vtestz.ps.256(<8 x float>, <8 x float>) nounwind readnone define i32 @test_mm256_testz_si256(<4 x i64> %a0, <4 x i64> %a1) nounwind { -; X32-LABEL: test_mm256_testz_si256: -; X32: # %bb.0: -; X32-NEXT: xorl %eax, %eax -; X32-NEXT: vptest %ymm1, %ymm0 -; X32-NEXT: sete %al -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_testz_si256: -; X64: # %bb.0: -; X64-NEXT: xorl %eax, %eax -; X64-NEXT: vptest %ymm1, %ymm0 -; X64-NEXT: sete %al -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_testz_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: vptest %ymm1, %ymm0 +; CHECK-NEXT: sete %al +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} %res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a0, <4 x i64> %a1) ret i32 %res } declare i32 @llvm.x86.avx.ptestz.256(<4 x i64>, <4 x i64>) nounwind readnone define <2 x double> @test_mm_undefined_pd() nounwind { -; X32-LABEL: test_mm_undefined_pd: -; X32: # %bb.0: -; X32-NEXT: retl -; -; X64-LABEL: test_mm_undefined_pd: -; X64: # %bb.0: -; X64-NEXT: retq +; CHECK-LABEL: test_mm_undefined_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} ret <2 x double> undef } define <4 x double> @test_mm256_undefined_pd() nounwind { -; X32-LABEL: test_mm256_undefined_pd: -; X32: # %bb.0: -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_undefined_pd: -; X64: # %bb.0: -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_undefined_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} ret <4 x double> undef } define <8 x float> @test_mm256_undefined_ps() nounwind { -; X32-LABEL: test_mm256_undefined_ps: -; X32: # %bb.0: -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_undefined_ps: -; X64: # %bb.0: -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_undefined_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} ret <8 x float> undef } define <4 x i64> @test_mm256_undefined_si256() nounwind { -; X32-LABEL: test_mm256_undefined_si256: -; X32: # %bb.0: -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_undefined_si256: -; X64: # %bb.0: -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_undefined_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: ret{{[l|q]}} ret <4 x i64> undef } define <4 x double> @test_mm256_unpackhi_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_unpackhi_pd: -; X32: # %bb.0: -; X32-NEXT: vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_unpackhi_pd: -; X64: # %bb.0: -; X64-NEXT: vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_unpackhi_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vunpckhpd {{.*#+}} ymm0 = ymm0[1],ymm1[1],ymm0[3],ymm1[3] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 1, i32 5, i32 3, i32 7> ret <4 x double> %res } define <8 x float> @test_mm256_unpackhi_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_unpackhi_ps: -; X32: # %bb.0: -; X32-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_unpackhi_ps: -; X64: # %bb.0: -; X64-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_unpackhi_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vunpckhps {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15> ret <8 x float> %res } define <4 x double> @test_mm256_unpacklo_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_unpacklo_pd: -; X32: # %bb.0: -; X32-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_unpacklo_pd: -; X64: # %bb.0: -; X64-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_unpacklo_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[2] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x double> %a0, <4 x double> %a1, <4 x i32> <i32 0, i32 4, i32 2, i32 6> ret <4 x double> %res } define <8 x float> @test_mm256_unpacklo_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_unpacklo_ps: -; X32: # %bb.0: -; X32-NEXT: vunpcklps {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5] -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_unpacklo_ps: -; X64: # %bb.0: -; X64-NEXT: vunpcklps {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5] -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_unpacklo_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vunpcklps {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5] +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13> ret <8 x float> %res } define <4 x double> @test_mm256_xor_pd(<4 x double> %a0, <4 x double> %a1) nounwind { -; X32-LABEL: test_mm256_xor_pd: -; X32: # %bb.0: -; X32-NEXT: vxorps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_xor_pd: -; X64: # %bb.0: -; X64-NEXT: vxorps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_xor_pd: +; CHECK: # %bb.0: +; CHECK-NEXT: vxorps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %1 = bitcast <4 x double> %a0 to <4 x i64> %2 = bitcast <4 x double> %a1 to <4 x i64> %res = xor <4 x i64> %1, %2 @@ -3731,15 +3042,10 @@ define <4 x double> @test_mm256_xor_pd(<4 x double> %a0, <4 x double> %a1) nounw } define <8 x float> @test_mm256_xor_ps(<8 x float> %a0, <8 x float> %a1) nounwind { -; X32-LABEL: test_mm256_xor_ps: -; X32: # %bb.0: -; X32-NEXT: vxorps %ymm1, %ymm0, %ymm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_xor_ps: -; X64: # %bb.0: -; X64-NEXT: vxorps %ymm1, %ymm0, %ymm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_xor_ps: +; CHECK: # %bb.0: +; CHECK-NEXT: vxorps %ymm1, %ymm0, %ymm0 +; CHECK-NEXT: ret{{[l|q]}} %1 = bitcast <8 x float> %a0 to <8 x i32> %2 = bitcast <8 x float> %a1 to <8 x i32> %res = xor <8 x i32> %1, %2 @@ -3748,73 +3054,48 @@ define <8 x float> @test_mm256_xor_ps(<8 x float> %a0, <8 x float> %a1) nounwind } define void @test_mm256_zeroall() nounwind { -; X32-LABEL: test_mm256_zeroall: -; X32: # %bb.0: -; X32-NEXT: vzeroall -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_zeroall: -; X64: # %bb.0: -; X64-NEXT: vzeroall -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_zeroall: +; CHECK: # %bb.0: +; CHECK-NEXT: vzeroall +; CHECK-NEXT: ret{{[l|q]}} call void @llvm.x86.avx.vzeroall() ret void } declare void @llvm.x86.avx.vzeroall() nounwind readnone define void @test_mm256_zeroupper() nounwind { -; X32-LABEL: test_mm256_zeroupper: -; X32: # %bb.0: -; X32-NEXT: vzeroupper -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_zeroupper: -; X64: # %bb.0: -; X64-NEXT: vzeroupper -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_zeroupper: +; CHECK: # %bb.0: +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: ret{{[l|q]}} call void @llvm.x86.avx.vzeroupper() ret void } declare void @llvm.x86.avx.vzeroupper() nounwind readnone define <4 x double> @test_mm256_zextpd128_pd256(<2 x double> %a0) nounwind { -; X32-LABEL: test_mm256_zextpd128_pd256: -; X32: # %bb.0: -; X32-NEXT: vmovaps %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_zextpd128_pd256: -; X64: # %bb.0: -; X64-NEXT: vmovaps %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_zextpd128_pd256: +; CHECK: # %bb.0: +; CHECK-NEXT: vmovaps %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <2 x double> %a0, <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ret <4 x double> %res } define <8 x float> @test_mm256_zextps128_ps256(<4 x float> %a0) nounwind { -; X32-LABEL: test_mm256_zextps128_ps256: -; X32: # %bb.0: -; X32-NEXT: vmovaps %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_zextps128_ps256: -; X64: # %bb.0: -; X64-NEXT: vmovaps %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_zextps128_ps256: +; CHECK: # %bb.0: +; CHECK-NEXT: vmovaps %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <4 x float> %a0, <4 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ret <8 x float> %res } define <4 x i64> @test_mm256_zextsi128_si256(<2 x i64> %a0) nounwind { -; X32-LABEL: test_mm256_zextsi128_si256: -; X32: # %bb.0: -; X32-NEXT: vmovaps %xmm0, %xmm0 -; X32-NEXT: retl -; -; X64-LABEL: test_mm256_zextsi128_si256: -; X64: # %bb.0: -; X64-NEXT: vmovaps %xmm0, %xmm0 -; X64-NEXT: retq +; CHECK-LABEL: test_mm256_zextsi128_si256: +; CHECK: # %bb.0: +; CHECK-NEXT: vmovaps %xmm0, %xmm0 +; CHECK-NEXT: ret{{[l|q]}} %res = shufflevector <2 x i64> %a0, <2 x i64> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ret <4 x i64> %res } |
