diff options
| -rw-r--r-- | clang/include/clang/AST/Type.h | 7 | ||||
| -rw-r--r-- | clang/lib/CodeGen/TargetInfo.cpp | 18 | ||||
| -rw-r--r-- | clang/test/CodeGen/arm-fp16-arguments.c | 24 |
3 files changed, 41 insertions, 8 deletions
diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h index 882878bb7e1..41b2ed445ce 100644 --- a/clang/include/clang/AST/Type.h +++ b/clang/include/clang/AST/Type.h @@ -1728,6 +1728,7 @@ public: bool isAnyComplexType() const; // C99 6.2.5p11 (complex) + Complex Int. bool isFloatingType() const; // C99 6.2.5p11 (real floating + complex) bool isHalfType() const; // OpenCL 6.1.1.1, NEON (IEEE 754-2008 half) + bool isFloat16Type() const; // C11 extension ISO/IEC TS 18661 bool isRealType() const; // C99 6.2.5p17 (real floating + integer) bool isArithmeticType() const; // C99 6.2.5p18 (integer + floating) bool isVoidType() const; // C99 6.2.5p19 @@ -6179,6 +6180,12 @@ inline bool Type::isHalfType() const { return false; } +inline bool Type::isFloat16Type() const { + if (const BuiltinType *BT = dyn_cast<BuiltinType>(CanonicalType)) + return BT->getKind() == BuiltinType::Float16; + return false; +} + inline bool Type::isNullPtrType() const { if (const BuiltinType *BT = getAs<BuiltinType>()) return BT->getKind() == BuiltinType::NullPtr; diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index d9d44fa4c1f..8641d872724 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -5721,10 +5721,11 @@ ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, return getNaturalAlignIndirect(Ty, /*ByVal=*/false); } - // __fp16 gets passed as if it were an int or float, but with the top 16 bits - // unspecified. This is not done for OpenCL as it handles the half type - // natively, and does not need to interwork with AAPCS code. - if (Ty->isHalfType() && !getContext().getLangOpts().NativeHalfArgsAndReturns) { + // _Float16 and __fp16 get passed as if it were an int or float, but with + // the top 16 bits unspecified. This is not done for OpenCL as it handles the + // half type natively, and does not need to interwork with AAPCS code. + if ((Ty->isFloat16Type() || Ty->isHalfType()) && + !getContext().getLangOpts().NativeHalfArgsAndReturns) { llvm::Type *ResType = IsEffectivelyAAPCS_VFP ? llvm::Type::getFloatTy(getVMContext()) : llvm::Type::getInt32Ty(getVMContext()); @@ -5919,10 +5920,11 @@ ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy, return getNaturalAlignIndirect(RetTy); } - // __fp16 gets returned as if it were an int or float, but with the top 16 - // bits unspecified. This is not done for OpenCL as it handles the half type - // natively, and does not need to interwork with AAPCS code. - if (RetTy->isHalfType() && !getContext().getLangOpts().NativeHalfArgsAndReturns) { + // _Float16 and __fp16 get returned as if it were an int or float, but with + // the top 16 bits unspecified. This is not done for OpenCL as it handles the + // half type natively, and does not need to interwork with AAPCS code. + if ((RetTy->isFloat16Type() || RetTy->isHalfType()) && + !getContext().getLangOpts().NativeHalfArgsAndReturns) { llvm::Type *ResType = IsEffectivelyAAPCS_VFP ? llvm::Type::getFloatTy(getVMContext()) : llvm::Type::getInt32Ty(getVMContext()); diff --git a/clang/test/CodeGen/arm-fp16-arguments.c b/clang/test/CodeGen/arm-fp16-arguments.c index 65f076ac3ca..d739f4b9c66 100644 --- a/clang/test/CodeGen/arm-fp16-arguments.c +++ b/clang/test/CodeGen/arm-fp16-arguments.c @@ -25,3 +25,27 @@ __fp16 t2() { return g; } // HARD: ret float [[BITCAST]] // NATIVE: [[LOAD:%.*]] = load half, half* @g // NATIVE: ret half [[LOAD]] + +_Float16 h; + +void t3(_Float16 a) { h = a; } +// SOFT: define void @t3(i32 [[PARAM:%.*]]) +// SOFT: [[TRUNC:%.*]] = trunc i32 [[PARAM]] to i16 +// HARD: define arm_aapcs_vfpcc void @t3(float [[PARAM:%.*]]) +// HARD: [[BITCAST:%.*]] = bitcast float [[PARAM]] to i32 +// HARD: [[TRUNC:%.*]] = trunc i32 [[BITCAST]] to i16 +// CHECK: store i16 [[TRUNC]], i16* bitcast (half* @h to i16*) +// NATIVE: define void @t3(half [[PARAM:%.*]]) +// NATIVE: store half [[PARAM]], half* @h + +_Float16 t4() { return h; } +// SOFT: define i32 @t4() +// HARD: define arm_aapcs_vfpcc float @t4() +// NATIVE: define half @t4() +// CHECK: [[LOAD:%.*]] = load i16, i16* bitcast (half* @h to i16*) +// CHECK: [[ZEXT:%.*]] = zext i16 [[LOAD]] to i32 +// SOFT: ret i32 [[ZEXT]] +// HARD: [[BITCAST:%.*]] = bitcast i32 [[ZEXT]] to float +// HARD: ret float [[BITCAST]] +// NATIVE: [[LOAD:%.*]] = load half, half* @h +// NATIVE: ret half [[LOAD]] |
