diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOP3Instructions.td | 12 | ||||
| -rw-r--r-- | llvm/test/MC/AMDGPU/vop3-gfx9.s | 32 |
2 files changed, 44 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td index 48729193208..3ba748839ed 100644 --- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td @@ -285,6 +285,12 @@ defm: Tenary_i16_Pats<mul, add, V_MAD_I16, sext>; let SubtargetPredicate = isGFX9 in { def V_PACK_B32_F16 : VOP3Inst <"v_pack_b32_f16", VOP3_Profile<VOP_B32_F16_F16>>; +def V_LSHL_ADD_U32 : VOP3Inst <"v_lshl_add_u32", VOP3_Profile<VOP_I32_I32_I32_I32>>; +def V_ADD_LSHL_U32 : VOP3Inst <"v_add_lshl_u32", VOP3_Profile<VOP_I32_I32_I32_I32>>; +def V_ADD3_U32 : VOP3Inst <"v_add3_u32", VOP3_Profile<VOP_I32_I32_I32_I32>>; +def V_LSHL_OR_B32 : VOP3Inst <"v_lshl_or_b32", VOP3_Profile<VOP_I32_I32_I32_I32>>; +def V_AND_OR_B32 : VOP3Inst <"v_and_or_b32", VOP3_Profile<VOP_I32_I32_I32_I32>>; +def V_OR3_B32 : VOP3Inst <"v_or3_b32", VOP3_Profile<VOP_I32_I32_I32_I32>>; } @@ -474,4 +480,10 @@ defm V_LSHRREV_B64 : VOP3_Real_vi <0x290>; defm V_ASHRREV_I64 : VOP3_Real_vi <0x291>; defm V_TRIG_PREOP_F64 : VOP3_Real_vi <0x292>; +defm V_LSHL_ADD_U32 : VOP3_Real_vi <0x1fd>; +defm V_ADD_LSHL_U32 : VOP3_Real_vi <0x1fe>; +defm V_ADD3_U32 : VOP3_Real_vi <0x1ff>; +defm V_LSHL_OR_B32 : VOP3_Real_vi <0x200>; +defm V_AND_OR_B32 : VOP3_Real_vi <0x201>; +defm V_OR3_B32 : VOP3_Real_vi <0x202>; defm V_PACK_B32_F16 : VOP3_Real_vi <0x2a0>; diff --git a/llvm/test/MC/AMDGPU/vop3-gfx9.s b/llvm/test/MC/AMDGPU/vop3-gfx9.s new file mode 100644 index 00000000000..609cf75c50c --- /dev/null +++ b/llvm/test/MC/AMDGPU/vop3-gfx9.s @@ -0,0 +1,32 @@ +// RUN: llvm-mc -arch=amdgcn -mcpu=gfx901 -show-encoding %s | FileCheck -check-prefix=GFX9 %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s + +v_lshl_add_u32 v1, v2, v3, v4 +// GFX9: v_lshl_add_u32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0xfd,0xd1,0x02,0x07,0x12,0x04] +// NOVI: :1: error: instruction not supported on this GPU + +v_add_lshl_u32 v1, v2, v3, v4 +// GFX9: v_add_lshl_u32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0xfe,0xd1,0x02,0x07,0x12,0x04] +// NOVI: :1: error: instruction not supported on this GPU + +v_add3_u32 v1, v2, v3, v4 +// GFX9: v_add3_u32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0xff,0xd1,0x02,0x07,0x12,0x04] +// NOVI: :1: error: instruction not supported on this GPU + +v_lshl_or_b32 v1, v2, v3, v4 +// GFX9: v_lshl_or_b32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0x00,0xd2,0x02,0x07,0x12,0x04] +// NOVI: :1: error: instruction not supported on this GPU + +v_and_or_b32 v1, v2, v3, v4 +// GFX9: v_and_or_b32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0x01,0xd2,0x02,0x07,0x12,0x04] +// NOVI: :1: error: instruction not supported on this GPU + +v_or3_b32 v1, v2, v3, v4 +// GFX9: v_or3_b32 v1, v2, v3, v4 ; encoding: [0x01,0x00,0x02,0xd2,0x02,0x07,0x12,0x04] +// NOVI: :1: error: instruction not supported on this GPU + +v_pack_b32_f16 v1, v2, v3 +// GFX9: v_pack_b32_f16 v1, v2, v3 ; encoding: [0x01,0x00,0xa0,0xd2,0x02,0x07,0x02,0x00] +// NOVI: :1: error: instruction not supported on this GPU |
