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-rw-r--r--llvm/lib/Target/X86/X86ISelDAGToDAG.cpp1
-rw-r--r--llvm/test/CodeGen/X86/dec-eflags-lower.ll14
2 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 709be5f8530..16f9c46c68d 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -2379,6 +2379,7 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) {
StoredVal->getOpcode() != X86ISD::DEC ||
StoredVal.getResNo() != 0 ||
!StoredVal.getNode()->hasNUsesOfValue(1, 0) ||
+ !Chain.getNode()->hasNUsesOfValue(1, 0) ||
StoredVal->getOperand(0).getNode() != Chain.getNode())
break;
diff --git a/llvm/test/CodeGen/X86/dec-eflags-lower.ll b/llvm/test/CodeGen/X86/dec-eflags-lower.ll
index 841a4615f53..190819f4cf8 100644
--- a/llvm/test/CodeGen/X86/dec-eflags-lower.ll
+++ b/llvm/test/CodeGen/X86/dec-eflags-lower.ll
@@ -43,6 +43,20 @@ store i32 %lor.ext.i, i32* @a, align 4, !tbaa !3
ret i32 0
}
+; CHECK: test2
+define i32 @test2() nounwind uwtable ssp {
+entry:
+; CHECK-NOT: decq ({{.*}})
+%0 = load i64* @c, align 8, !tbaa !0
+%dec.i = add nsw i64 %0, -1
+store i64 %dec.i, i64* @c, align 8, !tbaa !0
+%tobool.i = icmp ne i64 %0, 0
+%lor.ext.i = zext i1 %tobool.i to i32
+store i32 %lor.ext.i, i32* @a, align 4, !tbaa !3
+%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i64 0, i64 0), i64 %dec.i) nounwind
+ret i32 0
+}
+
declare i32 @printf(i8* nocapture, ...) nounwind
declare void @free(i8* nocapture) nounwind
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