diff options
3 files changed, 23 insertions, 14 deletions
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h index f310fc2af45..e98df234df8 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h @@ -37,6 +37,11 @@ public: .set(MachineFunctionProperties::Property::RegBankSelected); } + MachineFunctionProperties getSetProperties() const override { + return MachineFunctionProperties().set( + MachineFunctionProperties::Property::Selected); + } + InstructionSelect(); bool runOnMachineFunction(MachineFunction &MF) override; diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp index 92a755c9104..4ef4c43f763 100644 --- a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp +++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp @@ -85,20 +85,6 @@ bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) { assert(MF.size() == NumBlocks && "Inserting blocks is not supported yet"); - // Check that we did select everything. Do this separately to make sure we - // didn't miss any newly inserted instructions. - // FIXME: This (and other checks) should move into a verifier, predicated on - // a "post-isel" MachineFunction property. That would also let us selectively - // enable it depending on build configuration. - for (MachineBasicBlock &MBB : MF) { - for (MachineInstr &MI : MBB) { - if (isPreISelGenericOpcode(MI.getOpcode())) { - reportSelectionError( - MI, "Generic instruction survived instruction selection"); - } - } - } - // Now that selection is complete, there are no more generic vregs. // FIXME: We're still discussing what to do with the vreg->size map: // it's somewhat redundant (with the def MIs type size), but having to diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir index 44026a51dcf..4a722abc775 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir @@ -31,6 +31,8 @@ define void @store_s64_gpr(i64* %addr) { ret void } define void @store_s32_gpr(i32* %addr) { ret void } + define void @selected_property() { ret void } + ... --- @@ -419,3 +421,19 @@ body: | G_STORE { s32, p0 } %1, %0 :: (store 4 into %ir.addr) ... + +--- +# Check that we set the "selected" property. +# CHECK-LABEL: name: selected_property +# CHECK: legalized: true +# CHECK-NEXT: regBankSelected: true +# CHECK-NEXT: selected: true +# CHECK-NEXT: isSSA: true +name: selected_property +isSSA: true +legalized: true +regBankSelected: true +selected: false +body: | + bb.0: +... |
