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-rw-r--r--llvm/lib/Target/ARM/ARM.td2
-rw-r--r--llvm/test/CodeGen/ARM/build-attributes.ll2
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index ff12b36a0ea..96b4742da2b 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -416,7 +416,7 @@ def : ProcessorModel<"cortex-r4f", CortexA8Model,
def : ProcessorModel<"cortex-r5", CortexA8Model,
[ProcR5, HasV7Ops, FeatureDB,
FeatureVFP3, FeatureDSPThumb2,
- FeatureHasRAS, FeatureVFPOnlySP,
+ FeatureHasRAS,
FeatureD16, FeatureRClass]>;
// FIXME: R7 has currently the same ProcessorModel as A8 and is modelled as R5.
diff --git a/llvm/test/CodeGen/ARM/build-attributes.ll b/llvm/test/CodeGen/ARM/build-attributes.ll
index 69f02c0a86d..9aa2d6565d3 100644
--- a/llvm/test/CodeGen/ARM/build-attributes.ll
+++ b/llvm/test/CodeGen/ARM/build-attributes.ll
@@ -1071,7 +1071,7 @@
; CORTEX-R5: .eabi_attribute 23, 3
; CORTEX-R5: .eabi_attribute 24, 1
; CORTEX-R5: .eabi_attribute 25, 1
-; CORTEX-R5: .eabi_attribute 27, 1
+; CORTEX-R5-NOT: .eabi_attribute 27, 1
; CORTEX-R5-NOT: .eabi_attribute 28
; CORTEX-R5-NOT: .eabi_attribute 36
; CORTEX-R5: .eabi_attribute 38, 1
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