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-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 10c7e5d6d27..a99f05fc053 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -396,7 +396,9 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg,
assert(VT.isSimple() && "Non-simple types are invalid here!");
switch (VT.getSimpleVT().SimpleTy) {
- default: return false;
+ default:
+ assert(false && "Trying to emit for an unhandled type!");
+ return false;
case MVT::i32: {
ResultReg = createResultReg(ARM::GPRRegisterClass);
// TODO: Fix the Addressing modes so that these can share some code.
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