diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 12 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/frem-msvc32.ll | 12 |
2 files changed, 23 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index bfa4145d50e..de8d3e93b49 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -304,7 +304,17 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM, setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Legal); setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand); - setOperationAction(ISD::FREM , MVT::f32 , Expand); + + if (Subtarget->is32Bit() && Subtarget->isTargetKnownWindowsMSVC()) { + // On 32 bit MSVC, `fmodf(f32)` is not defined - only `fmod(f64)` + // is. We should promote the value to 64-bits to solve this. + // This is what the CRT headers do - `fmodf` is an inline header + // function casting to f64 and calling `fmod`. + setOperationAction(ISD::FREM , MVT::f32 , Promote); + } else { + setOperationAction(ISD::FREM , MVT::f32 , Expand); + } + setOperationAction(ISD::FREM , MVT::f64 , Expand); setOperationAction(ISD::FREM , MVT::f80 , Expand); setOperationAction(ISD::FLT_ROUNDS_ , MVT::i32 , Custom); diff --git a/llvm/test/CodeGen/X86/frem-msvc32.ll b/llvm/test/CodeGen/X86/frem-msvc32.ll new file mode 100644 index 00000000000..01144eb44de --- /dev/null +++ b/llvm/test/CodeGen/X86/frem-msvc32.ll @@ -0,0 +1,12 @@ +; Make sure that 32-bit FREM is promoted to 64-bit FREM on 32-bit MSVC. + +; MSVC does not have a 32-bit fmodf function, so it must be promoted to +; a 64-bit fmod rtlib call. +; RUN: llc -mtriple=i686-pc-windows-msvc -O0 < %s | FileCheck %s + +; CHECK: @do_frem32 +; CHECK: {{_fmod$}} +define float @do_frem32(float %a, float %b) { + %val = frem float %a, %b + ret float %val +} |
