diff options
-rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrFormats.td | 9 | ||||
-rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrFormatsC.td | 13 | ||||
-rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrInfoC.td | 21 | ||||
-rw-r--r-- | llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 7 |
4 files changed, 31 insertions, 19 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVInstrFormats.td b/llvm/lib/Target/RISCV/RISCVInstrFormats.td index 529e048045c..ebd676a6056 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrFormats.td +++ b/llvm/lib/Target/RISCV/RISCVInstrFormats.td @@ -45,11 +45,12 @@ def InstFormatCSS : InstFormat<10>; def InstFormatCIW : InstFormat<11>; def InstFormatCL : InstFormat<12>; def InstFormatCS : InstFormat<13>; -def InstFormatCB : InstFormat<14>; -def InstFormatCJ : InstFormat<15>; -def InstFormatOther : InstFormat<16>; +def InstFormatCA : InstFormat<14>; +def InstFormatCB : InstFormat<15>; +def InstFormatCJ : InstFormat<16>; +def InstFormatOther : InstFormat<17>; -// The following opcode names and match those given in Table 19.1 in the +// The following opcode names match those given in Table 19.1 in the // RISC-V User-level ISA specification ("RISC-V base opcode map"). class RISCVOpcode<bits<7> val> { bits<7> Value = val; diff --git a/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td b/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td index 6abcbd7cc8a..bda8bbb558e 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td +++ b/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td @@ -118,6 +118,19 @@ class RVInst16CS<bits<3> funct3, bits<2> opcode, dag outs, dag ins, let Inst{1-0} = opcode; } +class RVInst16CA<bits<6> funct6, bits<2> funct2, bits<2> opcode, dag outs, + dag ins, string opcodestr, string argstr> + : RVInst16<outs, ins, opcodestr, argstr, [], InstFormatCA> { + bits<3> rs2; + bits<3> rs1; + + let Inst{15-10} = funct6; + let Inst{9-7} = rs1; + let Inst{6-5} = funct2; + let Inst{4-2} = rs2; + let Inst{1-0} = opcode; +} + class RVInst16CB<bits<3> funct3, bits<2> opcode, dag outs, dag ins, string opcodestr, string argstr> : RVInst16<outs, ins, opcodestr, argstr, [], InstFormatCB> { diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td index a56778dd70f..e6b08b94fb1 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td @@ -258,16 +258,13 @@ class Shift_right<bits<2> funct2, string OpcodeStr, RegisterClass cls, } let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in -class CS_ALU<bits<2> funct2, string OpcodeStr, RegisterClass cls, - bit RV64only> - : RVInst16CS<0b100, 0b01, (outs cls:$rd_wb), (ins cls:$rd, cls:$rs2), +class CS_ALU<bits<6> funct6, bits<2> funct2, string OpcodeStr, + RegisterClass cls> + : RVInst16CA<funct6, funct2, 0b01, (outs cls:$rd_wb), (ins cls:$rd, cls:$rs2), OpcodeStr, "$rd, $rs2"> { bits<3> rd; let Constraints = "$rd = $rd_wb"; - let Inst{12} = RV64only; - let Inst{11-10} = 0b11; let Inst{9-7} = rd; - let Inst{6-5} = funct2; } //===----------------------------------------------------------------------===// @@ -411,14 +408,14 @@ def C_ANDI : RVInst16CB<0b100, 0b01, (outs GPRC:$rs1_wb), (ins GPRC:$rs1, simm6: let Inst{6-2} = imm{4-0}; } -def C_SUB : CS_ALU<0b00, "c.sub", GPRC, 0>; -def C_XOR : CS_ALU<0b01, "c.xor", GPRC, 0>; -def C_OR : CS_ALU<0b10, "c.or" , GPRC, 0>; -def C_AND : CS_ALU<0b11, "c.and", GPRC, 0>; +def C_SUB : CS_ALU<0b100011, 0b00, "c.sub", GPRC>; +def C_XOR : CS_ALU<0b100011, 0b01, "c.xor", GPRC>; +def C_OR : CS_ALU<0b100011, 0b10, "c.or" , GPRC>; +def C_AND : CS_ALU<0b100011, 0b11, "c.and", GPRC>; let Predicates = [HasStdExtC, IsRV64] in { -def C_SUBW : CS_ALU<0b00, "c.subw", GPRC, 1>; -def C_ADDW : CS_ALU<0b01, "c.addw", GPRC, 1>; +def C_SUBW : CS_ALU<0b100111, 0b00, "c.subw", GPRC>; +def C_ADDW : CS_ALU<0b100111, 0b01, "c.addw", GPRC>; } let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in diff --git a/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h index 86cd2d6e58a..372e0e80bba 100644 --- a/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h +++ b/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h @@ -39,9 +39,10 @@ enum { InstFormatCIW = 11, InstFormatCL = 12, InstFormatCS = 13, - InstFormatCB = 14, - InstFormatCJ = 15, - InstFormatOther = 16, + InstFormatCA = 14, + InstFormatCB = 15, + InstFormatCJ = 16, + InstFormatOther = 17, InstFormatMask = 31 }; |