diff options
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/f128-arith.ll | 14 |
2 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index c236bab2deb..ab1f84d9c44 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -820,6 +820,7 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, setOperationAction(ISD::FCOS , MVT::f128, Expand); setOperationAction(ISD::FPOW, MVT::f128, Expand); setOperationAction(ISD::FPOWI, MVT::f128, Expand); + setOperationAction(ISD::FREM, MVT::f128, Expand); } } @@ -1070,6 +1071,7 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, setLibcallName(RTLIB::FMIN_F128, "fminf128"); setLibcallName(RTLIB::FMAX_F128, "fmaxf128"); setLibcallName(RTLIB::POWI_F128, "__powikf2"); + setLibcallName(RTLIB::REM_F128, "fmodf128"); } // With 32 condition bits, we don't need to sink (and duplicate) compares diff --git a/llvm/test/CodeGen/PowerPC/f128-arith.ll b/llvm/test/CodeGen/PowerPC/f128-arith.ll index 534f8f22ebc..5f1296e7b9b 100644 --- a/llvm/test/CodeGen/PowerPC/f128-arith.ll +++ b/llvm/test/CodeGen/PowerPC/f128-arith.ll @@ -293,3 +293,17 @@ entry: ret void } declare fp128 @llvm.powi.f128(fp128 %Val, i32 %power) + +@a = common global fp128 0xL00000000000000000000000000000000, align 16 +@b = common global fp128 0xL00000000000000000000000000000000, align 16 + +define fp128 @qp_frem() #0 { +entry: + %0 = load fp128, fp128* @a, align 16 + %1 = load fp128, fp128* @b, align 16 + %rem = frem fp128 %0, %1 + ret fp128 %rem +; CHECK-LABEL: qp_frem +; CHECK: bl fmodf128 +; CHECK: blr +} |
