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-rw-r--r--llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp2
-rw-r--r--llvm/test/Transforms/InstCombine/and.ll4
2 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index a2e757cb427..73746bfda44 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -333,7 +333,7 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
KnownBits InputKnown(SrcBitWidth);
if (SimplifyDemandedBits(I, 0, InputDemandedMask, InputKnown, Depth + 1))
return I;
- Known = Known.zextOrTrunc(BitWidth);
+ Known = InputKnown.zextOrTrunc(BitWidth);
// Any top bits are known to be zero.
if (BitWidth > SrcBitWidth)
Known.Zero.setBitsFrom(SrcBitWidth);
diff --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll
index f5ee4022ce8..4925013b195 100644
--- a/llvm/test/Transforms/InstCombine/and.ll
+++ b/llvm/test/Transforms/InstCombine/and.ll
@@ -376,9 +376,7 @@ define i32 @and_zext_demanded(i16 %x, i32 %y) {
; CHECK-LABEL: @and_zext_demanded(
; CHECK-NEXT: [[S:%.*]] = lshr i16 %x, 8
; CHECK-NEXT: [[Z:%.*]] = zext i16 [[S]] to i32
-; CHECK-NEXT: [[O:%.*]] = or i32 %y, 255
-; CHECK-NEXT: [[A:%.*]] = and i32 [[O]], [[Z]]
-; CHECK-NEXT: ret i32 [[A]]
+; CHECK-NEXT: ret i32 [[Z]]
;
%s = lshr i16 %x, 8
%z = zext i16 %s to i32
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