diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/avx512-trunc-ext.ll | 10 |
2 files changed, 12 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 5ec719bbd8c..06528161e52 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -14022,8 +14022,8 @@ static SDValue LowerExtendedLoad(SDValue Op, const X86Subtarget *Subtarget, "Can only lower sext loads with a single scalar load!"); unsigned loadRegZize = RegSz; - if (Ext == ISD::SEXTLOAD && RegSz == 256) - loadRegZize /= 2; + if (Ext == ISD::SEXTLOAD && RegSz >= 256) + loadRegZize = 128; // Represent our vector as a sequence of elements which are the // largest scalar that we can load. diff --git a/llvm/test/CodeGen/X86/avx512-trunc-ext.ll b/llvm/test/CodeGen/X86/avx512-trunc-ext.ll index 09806e3ffb5..560d9680fc1 100644 --- a/llvm/test/CodeGen/X86/avx512-trunc-ext.ll +++ b/llvm/test/CodeGen/X86/avx512-trunc-ext.ll @@ -193,3 +193,13 @@ define <8 x i64> @sext_8i1_8i64(<8 x i32> %a1, <8 x i32> %a2) nounwind { %y = sext <8 x i1> %x to <8 x i64> ret <8 x i64> %y } + +; CHECK-LABEL: @extload_v8i64 +; CHECK: vpmovsxbq +define void @extload_v8i64(<8 x i8>* %a, <8 x i64>* %res) { + %sign_load = load <8 x i8>, <8 x i8>* %a + %c = sext <8 x i8> %sign_load to <8 x i64> + store <8 x i64> %c, <8 x i64>* %res + ret void +} + |
