diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp | 27 | ||||
| -rw-r--r-- | llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h | 7 |
2 files changed, 5 insertions, 29 deletions
diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp index 1378fdf32e2..467e7f7a76d 100644 --- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp @@ -752,12 +752,10 @@ const AArch64NamedImmMapper::Mapping AArch64SysReg::SysRegMapper::SysRegMappings {"ich_lr12_el2", ICH_LR12_EL2, 0}, {"ich_lr13_el2", ICH_LR13_EL2, 0}, {"ich_lr14_el2", ICH_LR14_EL2, 0}, - {"ich_lr15_el2", ICH_LR15_EL2, 0} -}; + {"ich_lr15_el2", ICH_LR15_EL2, 0}, -const AArch64NamedImmMapper::Mapping -AArch64SysReg::SysRegMapper::CycloneSysRegMappings[] = { - {"cpm_ioacc_ctl_el3", CPM_IOACC_CTL_EL3, 0} + // Cyclone registers + {"cpm_ioacc_ctl_el3", CPM_IOACC_CTL_EL3, AArch64::ProcCyclone}, }; uint32_t @@ -773,16 +771,6 @@ AArch64SysReg::SysRegMapper::fromString(StringRef Name, uint64_t FeatureBits, } } - // Next search for target specific registers - if (FeatureBits & AArch64::ProcCyclone) { - for (unsigned i = 0; i < array_lengthof(CycloneSysRegMappings); ++i) { - if (CycloneSysRegMappings[i].Name == NameLower) { - Valid = true; - return CycloneSysRegMappings[i].Value; - } - } - } - // Now try the instruction-specific registers (either read-only or // write-only). for (unsigned i = 0; i < NumInstMappings; ++i) { @@ -823,15 +811,6 @@ AArch64SysReg::SysRegMapper::toString(uint32_t Bits, uint64_t FeatureBits) const } } - // Next search for target specific registers - if (FeatureBits & AArch64::ProcCyclone) { - for (unsigned i = 0; i < array_lengthof(CycloneSysRegMappings); ++i) { - if (CycloneSysRegMappings[i].Value == Bits) { - return CycloneSysRegMappings[i].Name; - } - } - } - // Now try the instruction-specific registers (either read-only or // write-only). for (unsigned i = 0; i < NumInstMappings; ++i) { diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h index 2fcb4bb2c60..1594fa4f0cd 100644 --- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h @@ -1134,11 +1134,9 @@ namespace AArch64SysReg { ICH_LR13_EL2 = 0xe66d, // 11 100 1100 1101 101 ICH_LR14_EL2 = 0xe66e, // 11 100 1100 1101 110 ICH_LR15_EL2 = 0xe66f, // 11 100 1100 1101 111 - }; - // Cyclone specific system registers - enum CycloneSysRegValues { - CPM_IOACC_CTL_EL3 = 0xff90 + // Cyclone specific system registers + CPM_IOACC_CTL_EL3 = 0xff90, }; // Note that these do not inherit from AArch64NamedImmMapper. This class is @@ -1147,7 +1145,6 @@ namespace AArch64SysReg { // this one case. struct SysRegMapper { static const AArch64NamedImmMapper::Mapping SysRegMappings[]; - static const AArch64NamedImmMapper::Mapping CycloneSysRegMappings[]; const AArch64NamedImmMapper::Mapping *InstMappings; size_t NumInstMappings; |
