diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 12 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 2 |
2 files changed, 1 insertions, 13 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index 483793fe4dc..f152deb2800 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -1347,18 +1347,6 @@ void SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, } StringRef SIRegisterInfo::getRegAsmName(unsigned Reg) const { - // FIXME: Rename flat_scr so we don't need to special case this. - switch (Reg) { - case AMDGPU::FLAT_SCR: - return "flat_scratch"; - case AMDGPU::FLAT_SCR_LO: - return "flat_scratch_lo"; - case AMDGPU::FLAT_SCR_HI: - return "flat_scratch_hi"; - default: - break; - } - const TargetRegisterClass *RC = getMinimalPhysRegClass(Reg); unsigned Size = getRegSizeInBits(*RC); unsigned AltName = AMDGPU::NoRegAltName; diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.td b/llvm/lib/Target/AMDGPU/SIRegisterInfo.td index 353347073b8..59a2d89ca2c 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.td +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.td @@ -171,7 +171,7 @@ foreach Index = 0-15 in { multiclass FLAT_SCR_LOHI_m <string n, bits<16> ci_e, bits<16> vi_e> { def _ci : SIReg<n, ci_e>; def _vi : SIReg<n, vi_e>; - def "" : SIReg<"", 0>; + def "" : SIReg<n, 0>; } class FlatReg <Register lo, Register hi, bits<16> encoding> : |
