diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86FastISel.cpp | 11 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/pr23273.ll | 17 |
2 files changed, 23 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp index cdf10a73cc6..4d0ea2166c7 100644 --- a/llvm/lib/Target/X86/X86FastISel.cpp +++ b/llvm/lib/Target/X86/X86FastISel.cpp @@ -2065,6 +2065,12 @@ bool X86FastISel::X86SelectSelect(const Instruction *I) { } bool X86FastISel::X86SelectSIToFP(const Instruction *I) { + // The target-independent selection algorithm in FastISel already knows how + // to select a SINT_TO_FP if the target is SSE but not AVX. + // Early exit if the subtarget doesn't have AVX. + if (!Subtarget->hasAVX()) + return false; + if (!I->getOperand(0)->getType()->isIntegerTy(32)) return false; @@ -2087,11 +2093,6 @@ bool X86FastISel::X86SelectSIToFP(const Instruction *I) { } else return false; - // The target-independent selection algorithm in FastISel already knows how - // to select a SINT_TO_FP if the target is SSE but not AVX. This code is only - // reachable if the subtarget has AVX. - assert(Subtarget->hasAVX() && "Expected a subtarget with AVX!"); - unsigned ImplicitDefReg = createResultReg(RC); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(TargetOpcode::IMPLICIT_DEF), ImplicitDefReg); diff --git a/llvm/test/CodeGen/X86/pr23273.ll b/llvm/test/CodeGen/X86/pr23273.ll new file mode 100644 index 00000000000..2702eb820f2 --- /dev/null +++ b/llvm/test/CodeGen/X86/pr23273.ll @@ -0,0 +1,17 @@ +; RUN: llc -mtriple=i386-unknown-unknown -mcpu=generic -march=x86 -mattr=-sse2 -fast-isel < %s + +; Verify that the backend doesn't crash during fast-isel with an assertion +; failure when selecting a int-to-double conversion. The fast selection routine +; for SINT_TO_FP wrongly assumed that the target had at least SSE2. + +@a = common global i32 0, align 4 + +define i32 @pr23273() { +entry: + %0 = load i32, i32* @a, align 4 + %conv = sitofp i32 %0 to double + %call = call i32 @fn1(double %conv) + ret i32 0 +} + +declare i32 @fn1(double) #1 |
