diff options
| -rw-r--r-- | llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt b/llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt index 1bf033cbe3e..79e73e243d1 100644 --- a/llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt +++ b/llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt @@ -4,10 +4,6 @@ # Test generated by a LLVM MC Disassembler Protocol Buffer Fuzzer # for the RISC-V assembly language. -# This should not decode as c.addi4spn with 0 imm when compression is enabled. -[0x00 0x00] -# CHECK: warning: invalid instruction encoding - # This should not decode as c.addi16sp with 0 imm when compression is enabled. [0x01 0x61] # CHECK: warning: invalid instruction encoding |
