diff options
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZElimCompare.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp | 24 | ||||
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZShortenInst.cpp | 2 |
3 files changed, 25 insertions, 5 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp b/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp index 66509553714..1c791b6521d 100644 --- a/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp +++ b/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp @@ -216,7 +216,7 @@ SystemZElimCompare::convertToBRCT(MachineInstr *MI, MachineInstr *Compare, .addOperand(MI->getOperand(0)) .addOperand(MI->getOperand(1)) .addOperand(Target) - .addReg(SystemZ::CC, RegState::ImplicitDefine); + .addReg(SystemZ::CC, RegState::ImplicitDefine | RegState::Dead); MI->eraseFromParent(); return true; } @@ -448,7 +448,7 @@ fuseCompareAndBranch(MachineInstr *Compare, // to a non-fused branch because of a long displacement. Conditional // returns don't have that problem. MIB.addOperand(Target) - .addReg(SystemZ::CC, RegState::ImplicitDefine); + .addReg(SystemZ::CC, RegState::ImplicitDefine | RegState::Dead); } if (Type == SystemZII::CompareAndSibcall) diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp b/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp index 11b88788875..3938db256e7 100644 --- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp @@ -737,6 +737,14 @@ static LogicOp interpretAndImmediate(unsigned Opcode) { } } +static void transferDeadCC(MachineInstr *OldMI, MachineInstr *NewMI) { + if (OldMI->registerDefIsDead(SystemZ::CC)) { + MachineOperand *CCDef = NewMI->findRegisterDefOperand(SystemZ::CC); + if (CCDef != nullptr) + CCDef->setIsDead(true); + } +} + // Used to return from convertToThreeAddress after replacing two-address // instruction OldMI with three-address instruction NewMI. static MachineInstr *finishConvertToThreeAddress(MachineInstr *OldMI, @@ -750,6 +758,7 @@ static MachineInstr *finishConvertToThreeAddress(MachineInstr *OldMI, LV->replaceKillInstruction(Op.getReg(), OldMI, NewMI); } } + transferDeadCC(OldMI, NewMI); return NewMI; } @@ -842,19 +851,26 @@ MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl( unsigned Size = MFI->getObjectSize(FrameIndex); unsigned Opcode = MI->getOpcode(); +// XXX This is an introduction of a CC def and is illegal! Reactivate +// with a check of liveness of CC reg. +#if 0 if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) { if ((Opcode == SystemZ::LA || Opcode == SystemZ::LAY) && isInt<8>(MI->getOperand(2).getImm()) && !MI->getOperand(3).getReg()) { // LA(Y) %reg, CONST(%reg) -> AGSI %mem, CONST - return BuildMI(*InsertPt->getParent(), InsertPt, MI->getDebugLoc(), + MachineInstr *BuiltMI = + BuildMI(*InsertPt->getParent(), InsertPt, MI->getDebugLoc(), get(SystemZ::AGSI)) .addFrameIndex(FrameIndex) .addImm(0) .addImm(MI->getOperand(2).getImm()); + BuiltMI->findRegisterDefOperand(SystemZ::CC)->setIsDead(true); + return BuiltMI; } return nullptr; } +#endif // All other cases require a single operand. if (Ops.size() != 1) @@ -870,11 +886,14 @@ MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl( isInt<8>(MI->getOperand(2).getImm())) { // A(G)HI %reg, CONST -> A(G)SI %mem, CONST Opcode = (Opcode == SystemZ::AHI ? SystemZ::ASI : SystemZ::AGSI); - return BuildMI(*InsertPt->getParent(), InsertPt, MI->getDebugLoc(), + MachineInstr *BuiltMI = + BuildMI(*InsertPt->getParent(), InsertPt, MI->getDebugLoc(), get(Opcode)) .addFrameIndex(FrameIndex) .addImm(0) .addImm(MI->getOperand(2).getImm()); + transferDeadCC(MI, BuiltMI); + return BuiltMI; } if (Opcode == SystemZ::LGDR || Opcode == SystemZ::LDGR) { @@ -963,6 +982,7 @@ MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl( MIB.addFrameIndex(FrameIndex).addImm(Offset); if (MemDesc.TSFlags & SystemZII::HasIndex) MIB.addReg(0); + transferDeadCC(MI, MIB); return MIB; } } diff --git a/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp b/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp index 41ef3b340e2..2f31be87a3d 100644 --- a/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp +++ b/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp @@ -143,7 +143,7 @@ bool SystemZShortenInst::shortenOn001AddCC(MachineInstr &MI, unsigned Opcode) { if (!LiveRegs.contains(SystemZ::CC) && shortenOn001(MI, Opcode)) { MachineInstrBuilder(*MI.getParent()->getParent(), &MI) - .addReg(SystemZ::CC, RegState::ImplicitDefine); + .addReg(SystemZ::CC, RegState::ImplicitDefine | RegState::Dead); return true; } return false; |
