diff options
25 files changed, 625 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td index a764ac6543e..b145526ecec 100644 --- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -538,6 +538,21 @@ let Predicates = [HasSVE] in { defm CMPLO_PPzZI : sve_int_ucmp_vi<0b10, "cmplo">; defm CMPLS_PPzZI : sve_int_ucmp_vi<0b11, "cmpls">; + defm FCMGE_PPzZZ : sve_fp_3op_p_pd<0b000, "fcmge">; + defm FCMGT_PPzZZ : sve_fp_3op_p_pd<0b001, "fcmgt">; + defm FCMEQ_PPzZZ : sve_fp_3op_p_pd<0b010, "fcmeq">; + defm FCMNE_PPzZZ : sve_fp_3op_p_pd<0b011, "fcmne">; + defm FCMUO_PPzZZ : sve_fp_3op_p_pd<0b100, "fcmuo">; + defm FACGE_PPzZZ : sve_fp_3op_p_pd<0b101, "facge">; + defm FACGT_PPzZZ : sve_fp_3op_p_pd<0b111, "facgt">; + + defm FCMGE_PPzZ0 : sve_fp_2op_p_pd<0b000, "fcmge">; + defm FCMGT_PPzZ0 : sve_fp_2op_p_pd<0b001, "fcmgt">; + defm FCMLT_PPzZ0 : sve_fp_2op_p_pd<0b010, "fcmlt">; + defm FCMLE_PPzZ0 : sve_fp_2op_p_pd<0b011, "fcmle">; + defm FCMEQ_PPzZ0 : sve_fp_2op_p_pd<0b100, "fcmeq">; + defm FCMNE_PPzZ0 : sve_fp_2op_p_pd<0b110, "fcmne">; + defm SQINCB_XPiWdI : sve_int_pred_pattern_b_s32<0b00000, "sqincb">; defm UQINCB_WPiI : sve_int_pred_pattern_b_u32<0b00001, "uqincb">; defm SQDECB_XPiWdI : sve_int_pred_pattern_b_s32<0b00010, "sqdecb">; @@ -678,4 +693,32 @@ let Predicates = [HasSVE] in { (CMPGT_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>; def : InstAlias<"cmplt $Zd, $Pg/z, $Zm, $Zn", (CMPGT_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>; + + def : InstAlias<"facle $Zd, $Pg/z, $Zm, $Zn", + (FACGE_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>; + def : InstAlias<"facle $Zd, $Pg/z, $Zm, $Zn", + (FACGE_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>; + def : InstAlias<"facle $Zd, $Pg/z, $Zm, $Zn", + (FACGE_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>; + + def : InstAlias<"faclt $Zd, $Pg/z, $Zm, $Zn", + (FACGT_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>; + def : InstAlias<"faclt $Zd, $Pg/z, $Zm, $Zn", + (FACGT_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>; + def : InstAlias<"faclt $Zd, $Pg/z, $Zm, $Zn", + (FACGT_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>; + + def : InstAlias<"fcmle $Zd, $Pg/z, $Zm, $Zn", + (FCMGE_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>; + def : InstAlias<"fcmle $Zd, $Pg/z, $Zm, $Zn", + (FCMGE_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>; + def : InstAlias<"fcmle $Zd, $Pg/z, $Zm, $Zn", + (FCMGE_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>; + + def : InstAlias<"fcmlt $Zd, $Pg/z, $Zm, $Zn", + (FCMGT_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>; + def : InstAlias<"fcmlt $Zd, $Pg/z, $Zm, $Zn", + (FCMGT_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>; + def : InstAlias<"fcmlt $Zd, $Pg/z, $Zm, $Zn", + (FCMGT_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>; } diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index d042370acf4..bef18d71273 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -3381,7 +3381,7 @@ bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode, uint64_t IntVal = RealVal.bitcastToAPInt().getZExtValue(); if (Mnemonic != "fcmp" && Mnemonic != "fcmpe" && Mnemonic != "fcmeq" && Mnemonic != "fcmge" && Mnemonic != "fcmgt" && Mnemonic != "fcmle" && - Mnemonic != "fcmlt") + Mnemonic != "fcmlt" && Mnemonic != "fcmne") return TokError("unexpected floating point literal"); else if (IntVal != 0 || isNegative) return TokError("expected floating-point constant #0.0"); diff --git a/llvm/lib/Target/AArch64/SVEInstrFormats.td b/llvm/lib/Target/AArch64/SVEInstrFormats.td index 3700720fc7c..39c6783f85d 100644 --- a/llvm/lib/Target/AArch64/SVEInstrFormats.td +++ b/llvm/lib/Target/AArch64/SVEInstrFormats.td @@ -1232,6 +1232,71 @@ multiclass sve_int_ucmp_vi<bits<2> opc, string asm> { //===----------------------------------------------------------------------===// +// SVE Floating Point Compare - Vectors Group +//===----------------------------------------------------------------------===// + +class sve_fp_3op_p_pd<bits<2> sz, bits<3> opc, string asm, PPRRegOp pprty, + ZPRRegOp zprty> +: I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn, zprty:$Zm), + asm, "\t$Pd, $Pg/z, $Zn, $Zm", + "", + []>, Sched<[]> { + bits<4> Pd; + bits<3> Pg; + bits<5> Zm; + bits<5> Zn; + let Inst{31-24} = 0b01100101; + let Inst{23-22} = sz; + let Inst{21} = 0b0; + let Inst{20-16} = Zm; + let Inst{15} = opc{2}; + let Inst{14} = 0b1; + let Inst{13} = opc{1}; + let Inst{12-10} = Pg; + let Inst{9-5} = Zn; + let Inst{4} = opc{0}; + let Inst{3-0} = Pd; +} + +multiclass sve_fp_3op_p_pd<bits<3> opc, string asm> { + def _H : sve_fp_3op_p_pd<0b01, opc, asm, PPR16, ZPR16>; + def _S : sve_fp_3op_p_pd<0b10, opc, asm, PPR32, ZPR32>; + def _D : sve_fp_3op_p_pd<0b11, opc, asm, PPR64, ZPR64>; +} + + +//===----------------------------------------------------------------------===// +// SVE Floating Point Compare - with Zero Group +//===----------------------------------------------------------------------===// + +class sve_fp_2op_p_pd<bits<2> sz, bits<3> opc, string asm, PPRRegOp pprty, + ZPRRegOp zprty> +: I<(outs pprty:$Pd), (ins PPR3bAny:$Pg, zprty:$Zn), + asm, "\t$Pd, $Pg/z, $Zn, #0.0", + "", + []>, Sched<[]> { + bits<4> Pd; + bits<3> Pg; + bits<5> Zn; + let Inst{31-24} = 0b01100101; + let Inst{23-22} = sz; + let Inst{21-18} = 0b0100; + let Inst{17-16} = opc{2-1}; + let Inst{15-13} = 0b001; + let Inst{12-10} = Pg; + let Inst{9-5} = Zn; + let Inst{4} = opc{0}; + let Inst{3-0} = Pd; +} + +multiclass sve_fp_2op_p_pd<bits<3> opc, string asm> { + def _H : sve_fp_2op_p_pd<0b01, opc, asm, PPR16, ZPR16>; + def _S : sve_fp_2op_p_pd<0b10, opc, asm, PPR32, ZPR32>; + def _D : sve_fp_2op_p_pd<0b11, opc, asm, PPR64, ZPR64>; +} + + +//===----------------------------------------------------------------------===// //SVE Index Generation Group //===----------------------------------------------------------------------===// diff --git a/llvm/test/MC/AArch64/SVE/facge-diagnostics.s b/llvm/test/MC/AArch64/SVE/facge-diagnostics.s new file mode 100644 index 00000000000..08710681bf4 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/facge-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +facge p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: facge p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +facge p0.b, p0/z, z0.b, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal +// CHECK-NEXT: facge p0.b, p0/z, z0.b, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/facge.s b/llvm/test/MC/AArch64/SVE/facge.s new file mode 100644 index 00000000000..194bc78fda1 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/facge.s @@ -0,0 +1,26 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +facge p0.h, p0/z, z0.h, z1.h +// CHECK-INST: facge p0.h, p0/z, z0.h, z1.h +// CHECK-ENCODING: [0x10,0xc0,0x41,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 c0 41 65 <unknown> + +facge p0.s, p0/z, z0.s, z1.s +// CHECK-INST: facge p0.s, p0/z, z0.s, z1.s +// CHECK-ENCODING: [0x10,0xc0,0x81,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 c0 81 65 <unknown> + +facge p0.d, p0/z, z0.d, z1.d +// CHECK-INST: facge p0.d, p0/z, z0.d, z1.d +// CHECK-ENCODING: [0x10,0xc0,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 c0 c1 65 <unknown> diff --git a/llvm/test/MC/AArch64/SVE/facgt-diagnostics.s b/llvm/test/MC/AArch64/SVE/facgt-diagnostics.s new file mode 100644 index 00000000000..12c1ed53527 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/facgt-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +facgt p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: facgt p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +facgt p0.b, p0/z, z0.b, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal +// CHECK-NEXT: facgt p0.b, p0/z, z0.b, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/facgt.s b/llvm/test/MC/AArch64/SVE/facgt.s new file mode 100644 index 00000000000..e47812c67fe --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/facgt.s @@ -0,0 +1,26 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +facgt p0.h, p0/z, z0.h, z1.h +// CHECK-INST: facgt p0.h, p0/z, z0.h, z1.h +// CHECK-ENCODING: [0x10,0xe0,0x41,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 e0 41 65 <unknown> + +facgt p0.s, p0/z, z0.s, z1.s +// CHECK-INST: facgt p0.s, p0/z, z0.s, z1.s +// CHECK-ENCODING: [0x10,0xe0,0x81,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 e0 81 65 <unknown> + +facgt p0.d, p0/z, z0.d, z1.d +// CHECK-INST: facgt p0.d, p0/z, z0.d, z1.d +// CHECK-ENCODING: [0x10,0xe0,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 e0 c1 65 <unknown> diff --git a/llvm/test/MC/AArch64/SVE/facle-diagnostics.s b/llvm/test/MC/AArch64/SVE/facle-diagnostics.s new file mode 100644 index 00000000000..6ecfccffc26 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/facle-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +facle p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: facle p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +facle p0.b, p0/z, z0.b, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal +// CHECK-NEXT: facle p0.b, p0/z, z0.b, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/facle.s b/llvm/test/MC/AArch64/SVE/facle.s new file mode 100644 index 00000000000..a56ea9f0622 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/facle.s @@ -0,0 +1,26 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +facle p0.h, p0/z, z0.h, z1.h +// CHECK-INST: facge p0.h, p0/z, z1.h, z0.h +// CHECK-ENCODING: [0x30,0xc0,0x40,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 30 c0 40 65 <unknown> + +facle p0.s, p0/z, z0.s, z1.s +// CHECK-INST: facge p0.s, p0/z, z1.s, z0.s +// CHECK-ENCODING: [0x30,0xc0,0x80,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 30 c0 80 65 <unknown> + +facle p0.d, p0/z, z0.d, z1.d +// CHECK-INST: facge p0.d, p0/z, z1.d, z0.d +// CHECK-ENCODING: [0x30,0xc0,0xc0,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 30 c0 c0 65 <unknown> diff --git a/llvm/test/MC/AArch64/SVE/faclt-diagnostics.s b/llvm/test/MC/AArch64/SVE/faclt-diagnostics.s new file mode 100644 index 00000000000..b0ef736ffca --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/faclt-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +faclt p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: faclt p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +faclt p0.b, p0/z, z0.b, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal +// CHECK-NEXT: faclt p0.b, p0/z, z0.b, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/faclt.s b/llvm/test/MC/AArch64/SVE/faclt.s new file mode 100644 index 00000000000..b38ce25c6c0 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/faclt.s @@ -0,0 +1,26 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +faclt p0.h, p0/z, z0.h, z1.h +// CHECK-INST: facgt p0.h, p0/z, z1.h, z0.h +// CHECK-ENCODING: [0x30,0xe0,0x40,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 30 e0 40 65 <unknown> + +faclt p0.s, p0/z, z0.s, z1.s +// CHECK-INST: facgt p0.s, p0/z, z1.s, z0.s +// CHECK-ENCODING: [0x30,0xe0,0x80,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 30 e0 80 65 <unknown> + +faclt p0.d, p0/z, z0.d, z1.d +// CHECK-INST: facgt p0.d, p0/z, z1.d, z0.d +// CHECK-ENCODING: [0x30,0xe0,0xc0,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 30 e0 c0 65 <unknown> diff --git a/llvm/test/MC/AArch64/SVE/fcmeq-diagnostics.s b/llvm/test/MC/AArch64/SVE/fcmeq-diagnostics.s new file mode 100644 index 00000000000..d2e8dddda3e --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmeq-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +fcmeq p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: fcmeq p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fcmeq p0.s, p0/z, z0.s, #1.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 +// CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, #1.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/fcmeq.s b/llvm/test/MC/AArch64/SVE/fcmeq.s new file mode 100644 index 00000000000..5b75f6494d4 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmeq.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +fcmeq p0.h, p0/z, z0.h, #0.0 +// CHECK-INST: fcmeq p0.h, p0/z, z0.h, #0.0 +// CHECK-ENCODING: [0x00,0x20,0x52,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 52 65 <unknown> + +fcmeq p0.s, p0/z, z0.s, #0.0 +// CHECK-INST: fcmeq p0.s, p0/z, z0.s, #0.0 +// CHECK-ENCODING: [0x00,0x20,0x92,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 92 65 <unknown> + +fcmeq p0.d, p0/z, z0.d, #0.0 +// CHECK-INST: fcmeq p0.d, p0/z, z0.d, #0.0 +// CHECK-ENCODING: [0x00,0x20,0xd2,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 d2 65 <unknown> + +fcmeq p0.h, p0/z, z0.h, z1.h +// CHECK-INST: fcmeq p0.h, p0/z, z0.h, z1.h +// CHECK-ENCODING: [0x00,0x60,0x41,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 60 41 65 <unknown> + +fcmeq p0.s, p0/z, z0.s, z1.s +// CHECK-INST: fcmeq p0.s, p0/z, z0.s, z1.s +// CHECK-ENCODING: [0x00,0x60,0x81,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 60 81 65 <unknown> + +fcmeq p0.d, p0/z, z0.d, z1.d +// CHECK-INST: fcmeq p0.d, p0/z, z0.d, z1.d +// CHECK-ENCODING: [0x00,0x60,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 60 c1 65 <unknown> diff --git a/llvm/test/MC/AArch64/SVE/fcmge-diagnostics.s b/llvm/test/MC/AArch64/SVE/fcmge-diagnostics.s new file mode 100644 index 00000000000..d6d7b589c86 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmge-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +fcmge p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: fcmge p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fcmge p0.s, p0/z, z0.s, #1.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 +// CHECK-NEXT: fcmge p0.s, p0/z, z0.s, #1.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/fcmge.s b/llvm/test/MC/AArch64/SVE/fcmge.s new file mode 100644 index 00000000000..163b5d6275b --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmge.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +fcmge p0.h, p0/z, z0.h, #0.0 +// CHECK-INST: fcmge p0.h, p0/z, z0.h, #0.0 +// CHECK-ENCODING: [0x00,0x20,0x50,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 50 65 <unknown> + +fcmge p0.s, p0/z, z0.s, #0.0 +// CHECK-INST: fcmge p0.s, p0/z, z0.s, #0.0 +// CHECK-ENCODING: [0x00,0x20,0x90,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 90 65 <unknown> + +fcmge p0.d, p0/z, z0.d, #0.0 +// CHECK-INST: fcmge p0.d, p0/z, z0.d, #0.0 +// CHECK-ENCODING: [0x00,0x20,0xd0,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 d0 65 <unknown> + +fcmge p0.h, p0/z, z0.h, z1.h +// CHECK-INST: fcmge p0.h, p0/z, z0.h, z1.h +// CHECK-ENCODING: [0x00,0x40,0x41,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 40 41 65 <unknown> + +fcmge p0.s, p0/z, z0.s, z1.s +// CHECK-INST: fcmge p0.s, p0/z, z0.s, z1.s +// CHECK-ENCODING: [0x00,0x40,0x81,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 40 81 65 <unknown> + +fcmge p0.d, p0/z, z0.d, z1.d +// CHECK-INST: fcmge p0.d, p0/z, z0.d, z1.d +// CHECK-ENCODING: [0x00,0x40,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 40 c1 65 <unknown> diff --git a/llvm/test/MC/AArch64/SVE/fcmgt-diagnostics.s b/llvm/test/MC/AArch64/SVE/fcmgt-diagnostics.s new file mode 100644 index 00000000000..4ec876922bb --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmgt-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +fcmgt p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: fcmgt p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fcmgt p0.s, p0/z, z0.s, #1.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 +// CHECK-NEXT: fcmgt p0.s, p0/z, z0.s, #1.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/fcmgt.s b/llvm/test/MC/AArch64/SVE/fcmgt.s new file mode 100644 index 00000000000..edc7b7a57d9 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmgt.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +fcmgt p0.h, p0/z, z0.h, #0.0 +// CHECK-INST: fcmgt p0.h, p0/z, z0.h, #0.0 +// CHECK-ENCODING: [0x10,0x20,0x50,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 20 50 65 <unknown> + +fcmgt p0.s, p0/z, z0.s, #0.0 +// CHECK-INST: fcmgt p0.s, p0/z, z0.s, #0.0 +// CHECK-ENCODING: [0x10,0x20,0x90,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 20 90 65 <unknown> + +fcmgt p0.d, p0/z, z0.d, #0.0 +// CHECK-INST: fcmgt p0.d, p0/z, z0.d, #0.0 +// CHECK-ENCODING: [0x10,0x20,0xd0,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 20 d0 65 <unknown> + +fcmgt p0.h, p0/z, z0.h, z1.h +// CHECK-INST: fcmgt p0.h, p0/z, z0.h, z1.h +// CHECK-ENCODING: [0x10,0x40,0x41,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 40 41 65 <unknown> + +fcmgt p0.s, p0/z, z0.s, z1.s +// CHECK-INST: fcmgt p0.s, p0/z, z0.s, z1.s +// CHECK-ENCODING: [0x10,0x40,0x81,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 40 81 65 <unknown> + +fcmgt p0.d, p0/z, z0.d, z1.d +// CHECK-INST: fcmgt p0.d, p0/z, z0.d, z1.d +// CHECK-ENCODING: [0x10,0x40,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 40 c1 65 <unknown> diff --git a/llvm/test/MC/AArch64/SVE/fcmle-diagnostics.s b/llvm/test/MC/AArch64/SVE/fcmle-diagnostics.s new file mode 100644 index 00000000000..4ce8fb679e8 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmle-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +fcmle p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: fcmle p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fcmle p0.s, p0/z, z0.s, #1.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 +// CHECK-NEXT: fcmle p0.s, p0/z, z0.s, #1.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/fcmle.s b/llvm/test/MC/AArch64/SVE/fcmle.s new file mode 100644 index 00000000000..eec273fab5c --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmle.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +fcmle p0.h, p0/z, z0.h, #0.0 +// CHECK-INST: fcmle p0.h, p0/z, z0.h, #0.0 +// CHECK-ENCODING: [0x10,0x20,0x51,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 20 51 65 <unknown> + +fcmle p0.s, p0/z, z0.s, #0.0 +// CHECK-INST: fcmle p0.s, p0/z, z0.s, #0.0 +// CHECK-ENCODING: [0x10,0x20,0x91,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 20 91 65 <unknown> + +fcmle p0.d, p0/z, z0.d, #0.0 +// CHECK-INST: fcmle p0.d, p0/z, z0.d, #0.0 +// CHECK-ENCODING: [0x10,0x20,0xd1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 20 d1 65 <unknown> + +fcmle p0.h, p0/z, z0.h, z1.h +// CHECK-INST: fcmge p0.h, p0/z, z1.h, z0.h +// CHECK-ENCODING: [0x20,0x40,0x40,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 40 40 65 <unknown> + +fcmle p0.s, p0/z, z0.s, z1.s +// CHECK-INST: fcmge p0.s, p0/z, z1.s, z0.s +// CHECK-ENCODING: [0x20,0x40,0x80,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 40 80 65 <unknown> + +fcmle p0.d, p0/z, z0.d, z1.d +// CHECK-INST: fcmge p0.d, p0/z, z1.d, z0.d +// CHECK-ENCODING: [0x20,0x40,0xc0,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 20 40 c0 65 <unknown> diff --git a/llvm/test/MC/AArch64/SVE/fcmlt-diagnostics.s b/llvm/test/MC/AArch64/SVE/fcmlt-diagnostics.s new file mode 100644 index 00000000000..1e13a3d2e03 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmlt-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +fcmlt p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: fcmlt p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fcmlt p0.s, p0/z, z0.s, #1.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 +// CHECK-NEXT: fcmlt p0.s, p0/z, z0.s, #1.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/fcmlt.s b/llvm/test/MC/AArch64/SVE/fcmlt.s new file mode 100644 index 00000000000..aa0bb7d551c --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmlt.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +fcmlt p0.h, p0/z, z0.h, #0.0 +// CHECK-INST: fcmlt p0.h, p0/z, z0.h, #0.0 +// CHECK-ENCODING: [0x00,0x20,0x51,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 51 65 <unknown> + +fcmlt p0.s, p0/z, z0.s, #0.0 +// CHECK-INST: fcmlt p0.s, p0/z, z0.s, #0.0 +// CHECK-ENCODING: [0x00,0x20,0x91,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 91 65 <unknown> + +fcmlt p0.d, p0/z, z0.d, #0.0 +// CHECK-INST: fcmlt p0.d, p0/z, z0.d, #0.0 +// CHECK-ENCODING: [0x00,0x20,0xd1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 d1 65 <unknown> + +fcmlt p0.h, p0/z, z0.h, z1.h +// CHECK-INST: fcmgt p0.h, p0/z, z1.h, z0.h +// CHECK-ENCODING: [0x30,0x40,0x40,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 30 40 40 65 <unknown> + +fcmlt p0.s, p0/z, z0.s, z1.s +// CHECK-INST: fcmgt p0.s, p0/z, z1.s, z0.s +// CHECK-ENCODING: [0x30,0x40,0x80,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 30 40 80 65 <unknown> + +fcmlt p0.d, p0/z, z0.d, z1.d +// CHECK-INST: fcmgt p0.d, p0/z, z1.d, z0.d +// CHECK-ENCODING: [0x30,0x40,0xc0,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 30 40 c0 65 <unknown> diff --git a/llvm/test/MC/AArch64/SVE/fcmne-diagnostics.s b/llvm/test/MC/AArch64/SVE/fcmne-diagnostics.s new file mode 100644 index 00000000000..d0e996b4b7b --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmne-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +fcmne p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: fcmne p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fcmne p0.s, p0/z, z0.s, #1.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0 +// CHECK-NEXT: fcmne p0.s, p0/z, z0.s, #1.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/fcmne.s b/llvm/test/MC/AArch64/SVE/fcmne.s new file mode 100644 index 00000000000..3420e67e608 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmne.s @@ -0,0 +1,44 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +fcmne p0.h, p0/z, z0.h, #0.0 +// CHECK-INST: fcmne p0.h, p0/z, z0.h, #0.0 +// CHECK-ENCODING: [0x00,0x20,0x53,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 53 65 <unknown> + +fcmne p0.s, p0/z, z0.s, #0.0 +// CHECK-INST: fcmne p0.s, p0/z, z0.s, #0.0 +// CHECK-ENCODING: [0x00,0x20,0x93,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 93 65 <unknown> + +fcmne p0.d, p0/z, z0.d, #0.0 +// CHECK-INST: fcmne p0.d, p0/z, z0.d, #0.0 +// CHECK-ENCODING: [0x00,0x20,0xd3,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 20 d3 65 <unknown> + +fcmne p0.h, p0/z, z0.h, z1.h +// CHECK-INST: fcmne p0.h, p0/z, z0.h, z1.h +// CHECK-ENCODING: [0x10,0x60,0x41,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 60 41 65 <unknown> + +fcmne p0.s, p0/z, z0.s, z1.s +// CHECK-INST: fcmne p0.s, p0/z, z0.s, z1.s +// CHECK-ENCODING: [0x10,0x60,0x81,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 60 81 65 <unknown> + +fcmne p0.d, p0/z, z0.d, z1.d +// CHECK-INST: fcmne p0.d, p0/z, z0.d, z1.d +// CHECK-ENCODING: [0x10,0x60,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 10 60 c1 65 <unknown> diff --git a/llvm/test/MC/AArch64/SVE/fcmuo-diagnostics.s b/llvm/test/MC/AArch64/SVE/fcmuo-diagnostics.s new file mode 100644 index 00000000000..c9a33346b5f --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmuo-diagnostics.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s + +fcmuo p0.b, p0/z, z0.b, z0.b +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK-NEXT: fcmuo p0.b, p0/z, z0.b, z0.b +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: + +fcmuo p0.s, p0/z, z0.s, #0.0 +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal +// CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, #0.0 +// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: diff --git a/llvm/test/MC/AArch64/SVE/fcmuo.s b/llvm/test/MC/AArch64/SVE/fcmuo.s new file mode 100644 index 00000000000..194da77c088 --- /dev/null +++ b/llvm/test/MC/AArch64/SVE/fcmuo.s @@ -0,0 +1,27 @@ +// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \ +// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST +// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-ERROR +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST +// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \ +// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN + +fcmuo p0.h, p0/z, z0.h, z1.h +// CHECK-INST: fcmuo p0.h, p0/z, z0.h, z1.h +// CHECK-ENCODING: [0x00,0xc0,0x41,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c0 41 65 <unknown> + +fcmuo p0.s, p0/z, z0.s, z1.s +// CHECK-INST: fcmuo p0.s, p0/z, z0.s, z1.s +// CHECK-ENCODING: [0x00,0xc0,0x81,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c0 81 65 <unknown> + +fcmuo p0.d, p0/z, z0.d, z1.d +// CHECK-INST: fcmuo p0.d, p0/z, z0.d, z1.d +// CHECK-ENCODING: [0x00,0xc0,0xc1,0x65] +// CHECK-ERROR: instruction requires: sve +// CHECK-UNKNOWN: 00 c0 c1 65 <unknown> + |
