19 files changed, 0 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/MIR/AArch64/spill-fold.mir b/llvm/test/CodeGen/AArch64/spill-fold.mir
index b9406e54068..b9406e54068 100644
--- a/llvm/test/CodeGen/MIR/AArch64/spill-fold.mir
+++ b/llvm/test/CodeGen/AArch64/spill-fold.mir
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir b/llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
index cae8ed80d16..cae8ed80d16 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/fold-imm-f16-f32.mir
+++ b/llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/fold-multiple.mir b/llvm/test/CodeGen/AMDGPU/fold-multiple.mir
index b9b6ee6887b..b9b6ee6887b 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/fold-multiple.mir
+++ b/llvm/test/CodeGen/AMDGPU/fold-multiple.mir
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-atomic-insert-end.mir b/llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
index d4ddfbe31b9..d4ddfbe31b9 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-atomic-insert-end.mir
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
index 2f3095c777a..2f3095c777a 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
index 263bbeb0596..263bbeb0596 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
index 7e0c9e44e37..7e0c9e44e37 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
diff --git a/llvm/test/CodeGen/MIR/ARM/PR32721_ifcvt_triangle_unanalyzable.mir b/llvm/test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir
index c9a88b62ef9..c9a88b62ef9 100644
--- a/llvm/test/CodeGen/MIR/ARM/PR32721_ifcvt_triangle_unanalyzable.mir
+++ b/llvm/test/CodeGen/ARM/PR32721_ifcvt_triangle_unanalyzable.mir
diff --git a/llvm/test/CodeGen/MIR/ARM/ifcvt_canFallThroughTo.mir b/llvm/test/CodeGen/ARM/ifcvt_canFallThroughTo.mir
index 90d606a162d..90d606a162d 100644
--- a/llvm/test/CodeGen/MIR/ARM/ifcvt_canFallThroughTo.mir
+++ b/llvm/test/CodeGen/ARM/ifcvt_canFallThroughTo.mir
diff --git a/llvm/test/CodeGen/MIR/ARM/ifcvt_diamond_unanalyzable.mir b/llvm/test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir
index 6b7ad20aa12..6b7ad20aa12 100644
--- a/llvm/test/CodeGen/MIR/ARM/ifcvt_diamond_unanalyzable.mir
+++ b/llvm/test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir
diff --git a/llvm/test/CodeGen/MIR/ARM/ifcvt_forked_diamond_unanalyzable.mir b/llvm/test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir
index f5f09a8ec4a..f5f09a8ec4a 100644
--- a/llvm/test/CodeGen/MIR/ARM/ifcvt_forked_diamond_unanalyzable.mir
+++ b/llvm/test/CodeGen/ARM/ifcvt_forked_diamond_unanalyzable.mir
diff --git a/llvm/test/CodeGen/MIR/ARM/ifcvt_simple_bad_zero_prob_succ.mir b/llvm/test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir
index 13ba94fb672..13ba94fb672 100644
--- a/llvm/test/CodeGen/MIR/ARM/ifcvt_simple_bad_zero_prob_succ.mir
+++ b/llvm/test/CodeGen/ARM/ifcvt_simple_bad_zero_prob_succ.mir
diff --git a/llvm/test/CodeGen/MIR/ARM/ifcvt_simple_unanalyzable.mir b/llvm/test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir
index 8d1c71ac98f..8d1c71ac98f 100644
--- a/llvm/test/CodeGen/MIR/ARM/ifcvt_simple_unanalyzable.mir
+++ b/llvm/test/CodeGen/ARM/ifcvt_simple_unanalyzable.mir
diff --git a/llvm/test/CodeGen/MIR/ARM/ifcvt_triangleWoCvtToNextEdge.mir b/llvm/test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir
index 92ecbc8dbbe..92ecbc8dbbe 100644
--- a/llvm/test/CodeGen/MIR/ARM/ifcvt_triangleWoCvtToNextEdge.mir
+++ b/llvm/test/CodeGen/ARM/ifcvt_triangleWoCvtToNextEdge.mir
diff --git a/llvm/test/CodeGen/MIR/X86/dynamic-regmask.ll b/llvm/test/CodeGen/X86/dynamic-regmask.ll
index df58f4be79d..df58f4be79d 100644
--- a/llvm/test/CodeGen/MIR/X86/dynamic-regmask.ll
+++ b/llvm/test/CodeGen/X86/dynamic-regmask.ll
diff --git a/llvm/test/CodeGen/MIR/X86/opt_phis.mir b/llvm/test/CodeGen/X86/opt_phis.mir
index e282a92e201..e282a92e201 100644
--- a/llvm/test/CodeGen/MIR/X86/opt_phis.mir
+++ b/llvm/test/CodeGen/X86/opt_phis.mir
diff --git a/llvm/test/CodeGen/MIR/X86/shrink_wrap_dbg_value.mir b/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
index bdc214c8e7b..bdc214c8e7b 100644
--- a/llvm/test/CodeGen/MIR/X86/shrink_wrap_dbg_value.mir
+++ b/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
diff --git a/llvm/test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir b/llvm/test/CodeGen/X86/simple-register-allocation-read-undef.mir
index ff8fbe297c9..ff8fbe297c9 100644
--- a/llvm/test/CodeGen/MIR/X86/simple-register-allocation-read-undef.mir
+++ b/llvm/test/CodeGen/X86/simple-register-allocation-read-undef.mir
diff --git a/llvm/test/CodeGen/MIR/X86/unreachable-mbb-undef-phi.mir b/llvm/test/CodeGen/X86/unreachable-mbb-undef-phi.mir
index 52867e57445..52867e57445 100644
--- a/llvm/test/CodeGen/MIR/X86/unreachable-mbb-undef-phi.mir
+++ b/llvm/test/CodeGen/X86/unreachable-mbb-undef-phi.mir