diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 55 |
1 files changed, 27 insertions, 28 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index eb09a4386dd..2623da56fdd 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -30401,34 +30401,33 @@ static SDValue combineBitcast(SDNode *N, SelectionDAG &DAG, // Since MMX types are special and don't usually play with other vector types, // it's better to handle them early to be sure we emit efficient code by // avoiding store-load conversions. - - // Detect bitcasts between i32 to x86mmx low word. - if (VT == MVT::x86mmx && N0.getOpcode() == ISD::BUILD_VECTOR && - SrcVT == MVT::v2i32 && isNullConstant(N0.getOperand(1))) { - SDValue N00 = N0->getOperand(0); - if (N00.getValueType() == MVT::i32) - return DAG.getNode(X86ISD::MMX_MOVW2D, SDLoc(N00), VT, N00); - } - - // Detect bitcasts between element or subvector extraction to x86mmx. - if (VT == MVT::x86mmx && - (N0.getOpcode() == ISD::EXTRACT_VECTOR_ELT || - N0.getOpcode() == ISD::EXTRACT_SUBVECTOR) && - isNullConstant(N0.getOperand(1))) { - SDValue N00 = N0->getOperand(0); - if (N00.getValueType().is128BitVector()) - return DAG.getNode(X86ISD::MOVDQ2Q, SDLoc(N00), VT, - DAG.getBitcast(MVT::v2i64, N00)); - } - - // Detect bitcasts from FP_TO_SINT to x86mmx. - if (VT == MVT::x86mmx && SrcVT == MVT::v2i32 && - N0.getOpcode() == ISD::FP_TO_SINT) { - SDLoc DL(N0); - SDValue Res = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v4i32, N0, - DAG.getUNDEF(MVT::v2i32)); - return DAG.getNode(X86ISD::MOVDQ2Q, DL, VT, - DAG.getBitcast(MVT::v2i64, Res)); + if (VT == MVT::x86mmx) { + // Detect bitcasts between i32 to x86mmx low word. + if (N0.getOpcode() == ISD::BUILD_VECTOR && SrcVT == MVT::v2i32 && + isNullConstant(N0.getOperand(1))) { + SDValue N00 = N0.getOperand(0); + if (N00.getValueType() == MVT::i32) + return DAG.getNode(X86ISD::MMX_MOVW2D, SDLoc(N00), VT, N00); + } + + // Detect bitcasts between element or subvector extraction to x86mmx. + if ((N0.getOpcode() == ISD::EXTRACT_VECTOR_ELT || + N0.getOpcode() == ISD::EXTRACT_SUBVECTOR) && + isNullConstant(N0.getOperand(1))) { + SDValue N00 = N0.getOperand(0); + if (N00.getValueType().is128BitVector()) + return DAG.getNode(X86ISD::MOVDQ2Q, SDLoc(N00), VT, + DAG.getBitcast(MVT::v2i64, N00)); + } + + // Detect bitcasts from FP_TO_SINT to x86mmx. + if (SrcVT == MVT::v2i32 && N0.getOpcode() == ISD::FP_TO_SINT) { + SDLoc DL(N0); + SDValue Res = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v4i32, N0, + DAG.getUNDEF(MVT::v2i32)); + return DAG.getNode(X86ISD::MOVDQ2Q, DL, VT, + DAG.getBitcast(MVT::v2i64, Res)); + } } // Convert a bitcasted integer logic operation that has one bitcasted |
