diff options
-rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.cpp | 20 | ||||
-rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.h | 4 | ||||
-rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.td | 11 |
3 files changed, 3 insertions, 32 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.cpp b/llvm/lib/Target/R600/SIInstrInfo.cpp index b0952e357f1..88f9ee08c9e 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -426,29 +426,9 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, } } -static unsigned commuteCompareOpcode(unsigned Opcode) { - // Compares have arbitrarily selected that < is the "original" and > is the - // "reverse" - - int NewOpc; - - NewOpc = AMDGPU::getCommuteCmpRev(Opcode); - if (NewOpc != -1) - return NewOpc; - - NewOpc = AMDGPU::getCommuteCmpOrig(Opcode); - if (NewOpc != -1) - return NewOpc; - - return Opcode; -} - unsigned SIInstrInfo::commuteOpcode(const MachineInstr &MI) const { const unsigned Opcode = MI.getOpcode(); - if (MI.isCompare()) - return commuteCompareOpcode(Opcode); - int NewOpc; // Try to map original to commuted opcode diff --git a/llvm/lib/Target/R600/SIInstrInfo.h b/llvm/lib/Target/R600/SIInstrInfo.h index 62140086bb6..a9aa99fc227 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.h +++ b/llvm/lib/Target/R600/SIInstrInfo.h @@ -349,10 +349,6 @@ namespace AMDGPU { int getVOPe32(uint16_t Opcode); int getCommuteRev(uint16_t Opcode); int getCommuteOrig(uint16_t Opcode); - - int getCommuteCmpRev(uint16_t Opcode); - int getCommuteCmpOrig(uint16_t Opcode); - int getAddr64Inst(uint16_t Opcode); int getAtomicRetOp(uint16_t Opcode); int getAtomicNoRetOp(uint16_t Opcode); diff --git a/llvm/lib/Target/R600/SIInstrInfo.td b/llvm/lib/Target/R600/SIInstrInfo.td index 3288d33f1cf..a5a6d66c150 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.td +++ b/llvm/lib/Target/R600/SIInstrInfo.td @@ -829,11 +829,6 @@ class VOP2_REV <string revOp, bit isOrig> { bit IsOrig = isOrig; } -class VOPC_REV <string revOp, bit isOrig> { - string RevOp = revOp; - bit IsOrig = isOrig; -} - class AtomicNoRet <string noRetOp, bit isRet> { string NoRetOp = noRetOp; bit IsRet = isRet; @@ -1077,7 +1072,7 @@ multiclass VOP3_C_m <vop op, dag outs, dag ins, string asm, bit HasMods, bit defExec, string revOp> { def "" : VOP3_Pseudo <outs, ins, pattern, opName>, - VOPC_REV<revOp#"_e64", !eq(revOp, opName)>; + VOP2_REV<revOp#"_e64", !eq(revOp, opName)>; def _si : VOP3_Real_si <op.SI3, outs, ins, asm, opName>, VOP3DisableFields<1, 0, HasMods> { @@ -2246,7 +2241,7 @@ def getCommuteRev : InstrMapping { } def getCommuteCmpOrig : InstrMapping { - let FilterClass = "VOPC_REV"; + let FilterClass = "VOP2_REV"; let RowFields = ["RevOp"]; let ColFields = ["IsOrig"]; let KeyCol = ["0"]; @@ -2255,7 +2250,7 @@ def getCommuteCmpOrig : InstrMapping { // Maps an original opcode to its commuted version def getCommuteCmpRev : InstrMapping { - let FilterClass = "VOPC_REV"; + let FilterClass = "VOP2_REV"; let RowFields = ["RevOp"]; let ColFields = ["IsOrig"]; let KeyCol = ["1"]; |