diff options
| -rw-r--r-- | llvm/lib/Target/Mips/MipsFastISel.cpp | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll | 11 |
2 files changed, 17 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp index 94531642492..1581bc9c58a 100644 --- a/llvm/lib/Target/Mips/MipsFastISel.cpp +++ b/llvm/lib/Target/Mips/MipsFastISel.cpp @@ -216,7 +216,7 @@ public: !Subtarget->inMicroMipsMode() && Subtarget->hasMips32(); TargetSupported = ISASupported && TM.isPositionIndependent() && getABI().IsO32(); - UnsupportedFPMode = Subtarget->isFP64bit(); + UnsupportedFPMode = Subtarget->isFP64bit() || Subtarget->useSoftFloat(); } unsigned fastMaterializeAlloca(const AllocaInst *AI) override; @@ -1365,6 +1365,10 @@ bool MipsFastISel::fastLowerArguments() { break; case MVT::f32: + if (UnsupportedFPMode) { + DEBUG(dbgs() << ".. .. gave up (UnsupportedFPMode)\n"); + return false; + } if (NextFGR32 == FGR32ArgRegs.end()) { DEBUG(dbgs() << ".. .. gave up (ran out of FGR32 arguments)\n"); return false; @@ -1381,7 +1385,7 @@ bool MipsFastISel::fastLowerArguments() { case MVT::f64: if (UnsupportedFPMode) { - DEBUG(dbgs() << ".. .. gave up (UnsupportedFPMode\n"); + DEBUG(dbgs() << ".. .. gave up (UnsupportedFPMode)\n"); return false; } if (NextAFGR64 == AFGR64ArgRegs.end()) { diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll b/llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll new file mode 100644 index 00000000000..24161ca8238 --- /dev/null +++ b/llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll @@ -0,0 +1,11 @@ +; RUN: not llc -march=mipsel -mcpu=mips32r2 -mattr=+soft-float \ +; RUN: -O0 -fast-isel-abort=3 -relocation-model=pic < %s + +; Test that FastISel aborts instead of trying to lower arguments for soft-float. + +define void @__signbit(double %__x) { +entry: + %__x.addr = alloca double, align 8 + store double %__x, double* %__x.addr, align 8 + ret void +} |
