diff options
| -rw-r--r-- | llvm/lib/CodeGen/SplitKit.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/VirtRegMap.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/splitkit.mir | 41 |
3 files changed, 44 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SplitKit.cpp b/llvm/lib/CodeGen/SplitKit.cpp index 4e4298726c4..3a50aaa6998 100644 --- a/llvm/lib/CodeGen/SplitKit.cpp +++ b/llvm/lib/CodeGen/SplitKit.cpp @@ -502,7 +502,6 @@ SlotIndex SplitEditor::buildSingleSubRegCopy(unsigned FromReg, unsigned ToReg, if (FirstCopy) { SlotIndexes &Indexes = *LIS.getSlotIndexes(); Def = Indexes.insertMachineInstrInMaps(*CopyMI, Late).getRegSlot(); - DestLI.createDeadDef(Def, Allocator); } else { CopyMI->bundleWithPred(); } diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp index 06a97fd6d4d..c8946010e9d 100644 --- a/llvm/lib/CodeGen/VirtRegMap.cpp +++ b/llvm/lib/CodeGen/VirtRegMap.cpp @@ -383,8 +383,10 @@ void VirtRegRewriter::expandCopyBundle(MachineInstr &MI) const { if (MI.isBundledWithPred() && !MI.isBundledWithSucc()) { // Only do this when the complete bundle is made out of COPYs. + MachineBasicBlock &MBB = *MI.getParent(); for (MachineBasicBlock::reverse_instr_iterator I = - std::next(MI.getReverseIterator()); I->isBundledWithSucc(); ++I) { + std::next(MI.getReverseIterator()), E = MBB.instr_rend(); + I != E && I->isBundledWithSucc(); ++I) { if (!I->isCopy()) return; } diff --git a/llvm/test/CodeGen/AMDGPU/splitkit.mir b/llvm/test/CodeGen/AMDGPU/splitkit.mir index ee58138b1af..41782af40e3 100644 --- a/llvm/test/CodeGen/AMDGPU/splitkit.mir +++ b/llvm/test/CodeGen/AMDGPU/splitkit.mir @@ -2,6 +2,7 @@ --- | define amdgpu_kernel void @func0() #0 { ret void } define amdgpu_kernel void @func1() #0 { ret void } + define amdgpu_kernel void @splitHoist() #0 { ret void } attributes #0 = { "amdgpu-num-sgpr"="12" } ... @@ -62,3 +63,43 @@ body: | S_NOP 0, implicit %0.sub0 S_NOP 0, implicit %0.sub2 ... +--- +# Check that copy hoisting out of loops works. This mainly should not crash the +# compiler when it hoists a subreg copy sequence. +# CHECK-LABEL: name: splitHoist +# CHECK: S_NOP 0, implicit-def %sgpr0 +# CHECK: S_NOP 0, implicit-def %sgpr3 +# CHECK-NEXT: SI_SPILL_S128_SAVE +name: splitHoist +tracksRegLiveness: true +body: | + bb.0: + successors: %bb.1, %bb.2 + S_NOP 0, implicit-def undef %0.sub0 : sreg_128 + S_NOP 0, implicit-def %0.sub3 : sreg_128 + + S_CBRANCH_VCCNZ %bb.1, implicit undef %vcc + S_BRANCH %bb.2 + + bb.1: + successors: %bb.1, %bb.3 + S_NOP 0, implicit %0.sub0 + + ; Clobber registers + S_NOP 0, implicit-def dead %sgpr0, implicit-def dead %sgpr1, implicit-def dead %sgpr2, implicit-def dead %sgpr3, implicit-def dead %sgpr4, implicit-def dead %sgpr5, implicit-def dead %sgpr6, implicit-def dead %sgpr7, implicit-def dead %sgpr8, implicit-def dead %sgpr9, implicit-def dead %sgpr10, implicit-def dead %sgpr11 + + S_CBRANCH_VCCNZ %bb.1, implicit undef %vcc + S_BRANCH %bb.3 + + bb.2: + successors: %bb.3 + ; Clobber registers + S_NOP 0, implicit-def dead %sgpr0, implicit-def dead %sgpr1, implicit-def dead %sgpr2, implicit-def dead %sgpr3, implicit-def dead %sgpr4, implicit-def dead %sgpr5, implicit-def dead %sgpr6, implicit-def dead %sgpr7, implicit-def dead %sgpr8, implicit-def dead %sgpr9, implicit-def dead %sgpr10, implicit-def dead %sgpr11 + S_BRANCH %bb.3 + + bb.3: + S_NOP 0, implicit %0.sub0 + S_NOP 0, implicit %0.sub3 + S_NOP 0, implicit %0.sub0 + S_NOP 0, implicit %0.sub3 +... |
