diff options
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 24 | ||||
| -rw-r--r-- | llvm/lib/Target/TargetMachine.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/mcm-obj.ll | 5 |
4 files changed, 13 insertions, 25 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp index e8a87e7f443..ccf0f80c336 100644 --- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp @@ -220,8 +220,8 @@ bool PPCSubtarget::enableSubRegLiveness() const { return UseSubRegLiveness; } -unsigned char PPCSubtarget::classifyGlobalReference( - const GlobalValue *GV) const { +unsigned char +PPCSubtarget::classifyGlobalReference(const GlobalValue *GV) const { // Note that currently we don't generate non-pic references. // If a caller wants that, this will have to be updated. @@ -229,23 +229,9 @@ unsigned char PPCSubtarget::classifyGlobalReference( if (TM.getCodeModel() == CodeModel::Large) return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG; - unsigned char flags = PPCII::MO_PIC_FLAG; - - // Only if the relocation mode is PIC do we have to worry about - // interposition. In all other cases we can use a slightly looser standard to - // decide how to access the symbol. - if (TM.getRelocationModel() == Reloc::PIC_) { - // If it's local, or it's non-default, it can't be interposed. - if (!GV->hasLocalLinkage() && - GV->hasDefaultVisibility()) { - flags |= PPCII::MO_NLP_FLAG; - } - return flags; - } - - if (GV->isStrongDefinitionForLinker()) - return flags; - return flags | PPCII::MO_NLP_FLAG; + if (TM.shouldAssumeDSOLocal(*GV->getParent(), GV)) + return PPCII::MO_PIC_FLAG; + return PPCII::MO_PIC_FLAG | PPCII::MO_NLP_FLAG; } bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); } diff --git a/llvm/lib/Target/TargetMachine.cpp b/llvm/lib/Target/TargetMachine.cpp index 438c62dd5ae..4beecb4dbb6 100644 --- a/llvm/lib/Target/TargetMachine.cpp +++ b/llvm/lib/Target/TargetMachine.cpp @@ -163,8 +163,11 @@ bool TargetMachine::shouldAssumeDSOLocal(const Module &M, bool IsTLS = GV && GV->isThreadLocal(); bool IsAccessViaCopyRelocs = Options.MCOptions.MCPIECopyRelocations && GV && isa<GlobalVariable>(GV); - // Check if we can use copy relocations. - if (!IsTLS && (RM == Reloc::Static || IsAccessViaCopyRelocs)) + Triple::ArchType Arch = TT.getArch(); + bool IsPPC = + Arch == Triple::ppc || Arch == Triple::ppc64 || Arch == Triple::ppc64le; + // Check if we can use copy relocations. PowerPC has no copy relocations. + if (!IsTLS && !IsPPC && (RM == Reloc::Static || IsAccessViaCopyRelocs)) return true; } diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll b/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll index 1990f6b51d5..5317829c6ce 100644 --- a/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll +++ b/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll @@ -196,7 +196,7 @@ define void @t17(i64 %v) nounwind { %1 = add nsw i64 %v, 1 store i64 %1, i64* getelementptr inbounds ([8192 x i64], [8192 x i64]* @i, i32 0, i64 5000), align 8 ; ELF64: addis -; ELF64: ld +; ELF64: addi ; ELF64: addi ; ELF64: lis ; ELF64: ori diff --git a/llvm/test/CodeGen/PowerPC/mcm-obj.ll b/llvm/test/CodeGen/PowerPC/mcm-obj.ll index 6b5b0c2b742..fa899b5b301 100644 --- a/llvm/test/CodeGen/PowerPC/mcm-obj.ll +++ b/llvm/test/CodeGen/PowerPC/mcm-obj.ll @@ -108,11 +108,10 @@ entry: ret i32 %0 } -; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for -; accessing tentatively declared variable ti. +; Verify generation of relocations foraccessing variable ti. ; ; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]] -; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM6]] ; ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]] ; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]] |
