diff options
| -rw-r--r-- | llvm/test/CodeGen/WebAssembly/negative-base-reg.ll | 9 | ||||
| -rw-r--r-- | llvm/test/CodeGen/WebAssembly/offset-fastisel.ll | 12 | ||||
| -rw-r--r-- | llvm/test/CodeGen/WebAssembly/vector-sdiv.ll | 2 |
3 files changed, 12 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/negative-base-reg.ll b/llvm/test/CodeGen/WebAssembly/negative-base-reg.ll index fc3a287f585..16b4a15a44b 100644 --- a/llvm/test/CodeGen/WebAssembly/negative-base-reg.ll +++ b/llvm/test/CodeGen/WebAssembly/negative-base-reg.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt | FileCheck %s target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" -target triple = "wasm32---elf" +target triple = "wasm32-unknown-unknown" @args = hidden local_unnamed_addr global [32 x i32] zeroinitializer, align 16 @@ -10,7 +10,8 @@ define hidden i32 @main() local_unnamed_addr #0 { ; If LSR stops selecting a negative base reg value, then this test will no ; longer be useful as written. -; CHECK: i32.const $0=, -128 +; CHECK: i32.const $push[[L0:[0-9]+]]=, -128 +; CHECK-NEXT: set_local 0, $pop[[L0]] entry: br label %for.body @@ -18,8 +19,8 @@ for.body: ; preds = %for.body, %entry %i.04 = phi i32 [ 0, %entry ], [ %inc, %for.body ] ; The offset should not be folded into the store. ; CHECK: i32.const $push{{[0-9]+}}=, args+128 -; CHECK: i32.add -; CHECK: i32.store 0( +; CHECK: i32.add $push[[L1:[0-9]+]]=, +; CHECK: i32.store 0($pop[[L1]]) %arrayidx = getelementptr inbounds [32 x i32], [32 x i32]* @args, i32 0, i32 %i.04 store i32 1, i32* %arrayidx, align 4, !tbaa !1 %inc = add nuw nsw i32 %i.04, 1 diff --git a/llvm/test/CodeGen/WebAssembly/offset-fastisel.ll b/llvm/test/CodeGen/WebAssembly/offset-fastisel.ll index af4ca6f9c99..abad8917e9d 100644 --- a/llvm/test/CodeGen/WebAssembly/offset-fastisel.ll +++ b/llvm/test/CodeGen/WebAssembly/offset-fastisel.ll @@ -3,7 +3,7 @@ ; TODO: Merge this with offset.ll when fast-isel matches better. target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" -target triple = "wasm32-unknown-unknown-elf" +target triple = "wasm32-unknown-unknown" ; CHECK-LABEL: store_i8_with_variable_gep_offset: ; CHECK: i32.add $push[[L0:[0-9]+]]=, $0, $1{{$}} @@ -16,11 +16,11 @@ define void @store_i8_with_variable_gep_offset(i8* %p, i32 %idx) { } ; CHECK-LABEL: store_i8_with_array_alloca_gep: -; CHECK: i32.const $push[[L0:[0-9]+]]=, 0{{$}} -; CHECK: i32.load $push[[L1:[0-9]+]]=, __stack_pointer($pop[[L0]]){{$}} -; CHECK: i32.const $push[[L2:[0-9]+]]=, 32{{$}} -; CHECK: i32.sub $push{{[0-9]+}}=, $pop[[L1]], $pop[[L2]]{{$}} -; CHECK: i32.add $push[[L4:[0-9]+]]=, $pop{{[0-9]+}}, $0{{$}} +; CHECK: get_global $push[[L0:[0-9]+]]=, __stack_pointer +; CHECK: i32.const $push[[L1:[0-9]+]]=, 32{{$}} +; CHECK: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}} +; CHECK: copy_local $push[[L3:[0-9]+]]=, $pop[[L2]] +; CHECK: i32.add $push[[L4:[0-9]+]]=, $pop[[L3]], $0{{$}} ; CHECK: i32.const $push[[L5:[0-9]+]]=, 0{{$}} ; CHECK: i32.store8 0($pop[[L4]]), $pop[[L5]]{{$}} define hidden void @store_i8_with_array_alloca_gep(i32 %idx) { diff --git a/llvm/test/CodeGen/WebAssembly/vector-sdiv.ll b/llvm/test/CodeGen/WebAssembly/vector-sdiv.ll index 4aaf759caa5..369cf32d951 100644 --- a/llvm/test/CodeGen/WebAssembly/vector-sdiv.ll +++ b/llvm/test/CodeGen/WebAssembly/vector-sdiv.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -asm-verbose=false -fast-isel=false -disable-wasm-fallthrough-return-opt | FileCheck %s target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" -target triple = "wasm32-unknown-unknown-elf" +target triple = "wasm32-unknown-unknown" ; This should be treated as a non-splat vector of pow2 divisor, so sdivs will be ; transformed to shrs in DAGCombiner. There will be 4 stores and 3 shrs (For '1' |
