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-rw-r--r--llvm/include/llvm/MC/MCSchedule.h6
-rw-r--r--llvm/lib/CodeGen/TargetSchedule.cpp33
-rw-r--r--llvm/lib/MC/MCSchedule.cpp24
3 files changed, 34 insertions, 29 deletions
diff --git a/llvm/include/llvm/MC/MCSchedule.h b/llvm/include/llvm/MC/MCSchedule.h
index f1f5f3ffc9c..62f8efd8dfb 100644
--- a/llvm/include/llvm/MC/MCSchedule.h
+++ b/llvm/include/llvm/MC/MCSchedule.h
@@ -15,6 +15,7 @@
#ifndef LLVM_MC_MCSCHEDULE_H
#define LLVM_MC_MCSCHEDULE_H
+#include "llvm/ADT/Optional.h"
#include "llvm/Support/DataTypes.h"
#include <cassert>
@@ -231,6 +232,11 @@ struct MCSchedModel {
static int computeInstrLatency(const MCSubtargetInfo &STI,
const MCSchedClassDesc &SCDesc);
+ /// Returns the reciprocal throughput information from a MCSchedClassDesc.
+ static Optional<double>
+ getReciprocalThroughput(const MCSubtargetInfo &STI,
+ const MCSchedClassDesc &SCDesc);
+
/// Returns the default initialized model.
static const MCSchedModel &GetDefaultSchedModel() { return Default; }
static const MCSchedModel Default;
diff --git a/llvm/lib/CodeGen/TargetSchedule.cpp b/llvm/lib/CodeGen/TargetSchedule.cpp
index 432545bde1f..a811450c2ae 100644
--- a/llvm/lib/CodeGen/TargetSchedule.cpp
+++ b/llvm/lib/CodeGen/TargetSchedule.cpp
@@ -347,38 +347,13 @@ getRThroughputFromItineraries(unsigned schedClass,
return Throughput;
}
-static Optional<double>
-getRThroughputFromInstrSchedModel(const MCSchedClassDesc *SCDesc,
- const TargetSubtargetInfo *STI,
- const MCSchedModel &SchedModel) {
- Optional<double> Throughput;
-
- for (const MCWriteProcResEntry *WPR = STI->getWriteProcResBegin(SCDesc),
- *WEnd = STI->getWriteProcResEnd(SCDesc);
- WPR != WEnd; ++WPR) {
- if (WPR->Cycles) {
- unsigned NumUnits =
- SchedModel.getProcResource(WPR->ProcResourceIdx)->NumUnits;
- double Temp = NumUnits * 1.0 / WPR->Cycles;
- Throughput = Throughput.hasValue()
- ? std::min(Throughput.getValue(), Temp)
- : Temp;
- }
- }
- if (Throughput.hasValue())
- // We need reciprocal throughput that's why we return such value.
- return 1 / Throughput.getValue();
- return Throughput;
-}
-
Optional<double>
TargetSchedModel::computeInstrRThroughput(const MachineInstr *MI) const {
if (hasInstrItineraries())
return getRThroughputFromItineraries(MI->getDesc().getSchedClass(),
getInstrItineraries());
if (hasInstrSchedModel())
- return getRThroughputFromInstrSchedModel(resolveSchedClass(MI), STI,
- SchedModel);
+ return MCSchedModel::getReciprocalThroughput(*STI, *resolveSchedClass(MI));
return Optional<double>();
}
@@ -388,9 +363,9 @@ TargetSchedModel::computeInstrRThroughput(unsigned Opcode) const {
if (hasInstrItineraries())
return getRThroughputFromItineraries(SchedClass, getInstrItineraries());
if (hasInstrSchedModel()) {
- const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass);
- if (SCDesc->isValid() && !SCDesc->isVariant())
- return getRThroughputFromInstrSchedModel(SCDesc, STI, SchedModel);
+ const MCSchedClassDesc &SCDesc = *SchedModel.getSchedClassDesc(SchedClass);
+ if (SCDesc.isValid() && !SCDesc.isVariant())
+ return MCSchedModel::getReciprocalThroughput(*STI, SCDesc);
}
return Optional<double>();
}
diff --git a/llvm/lib/MC/MCSchedule.cpp b/llvm/lib/MC/MCSchedule.cpp
index 653049cc267..a91bb862f09 100644
--- a/llvm/lib/MC/MCSchedule.cpp
+++ b/llvm/lib/MC/MCSchedule.cpp
@@ -49,3 +49,27 @@ int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI,
}
return Latency;
}
+
+
+Optional<double>
+MCSchedModel::getReciprocalThroughput(const MCSubtargetInfo &STI,
+ const MCSchedClassDesc &SCDesc) {
+ Optional<double> Throughput;
+ const MCSchedModel &SchedModel = STI.getSchedModel();
+
+ for (const MCWriteProcResEntry *WPR = STI.getWriteProcResBegin(&SCDesc),
+ *WEnd = STI.getWriteProcResEnd(&SCDesc);
+ WPR != WEnd; ++WPR) {
+ if (WPR->Cycles) {
+ unsigned NumUnits =
+ SchedModel.getProcResource(WPR->ProcResourceIdx)->NumUnits;
+ double Temp = NumUnits * 1.0 / WPR->Cycles;
+ Throughput =
+ Throughput.hasValue() ? std::min(Throughput.getValue(), Temp) : Temp;
+ }
+ }
+
+ if (Throughput.hasValue())
+ return 1 / Throughput.getValue();
+ return Throughput;
+}
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