diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-pcmp.ll | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/vector-pcmp.ll b/llvm/test/CodeGen/X86/vector-pcmp.ll new file mode 100644 index 00000000000..ff0f27b8ba8 --- /dev/null +++ b/llvm/test/CodeGen/X86/vector-pcmp.ll @@ -0,0 +1,88 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 + +; FIXME: https://llvm.org/bugs/show_bug.cgi?id=26701 + +define <16 x i8> @pcmpgtb(<16 x i8> %x) { +; SSE-LABEL: pcmpgtb: +; SSE: # BB#0: +; SSE-NEXT: pxor %xmm1, %xmm1 +; SSE-NEXT: pcmpgtb %xmm0, %xmm1 +; SSE-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE-NEXT: pxor %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: pcmpgtb: +; AVX: # BB#0: +; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 +; AVX-NEXT: vpcmpgtb %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 +; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retq + %sign = ashr <16 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7> + %not = xor <16 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> + ret <16 x i8> %not +} + +define <8 x i16> @pcmpgtw(<8 x i16> %x) { +; SSE-LABEL: pcmpgtw: +; SSE: # BB#0: +; SSE-NEXT: psraw $15, %xmm0 +; SSE-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE-NEXT: pxor %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: pcmpgtw: +; AVX: # BB#0: +; AVX-NEXT: vpsraw $15, %xmm0, %xmm0 +; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 +; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retq + %sign = ashr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15> + %not = xor <8 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> + ret <8 x i16> %not +} + +define <4 x i32> @pcmpgtd(<4 x i32> %x) { +; SSE-LABEL: pcmpgtd: +; SSE: # BB#0: +; SSE-NEXT: psrad $31, %xmm0 +; SSE-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE-NEXT: pxor %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: pcmpgtd: +; AVX: # BB#0: +; AVX-NEXT: vpsrad $31, %xmm0, %xmm0 +; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 +; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retq + %sign = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31> + %not = xor <4 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1> + ret <4 x i32> %not +} + +define <2 x i64> @pcmpgtq(<2 x i64> %x) { +; SSE-LABEL: pcmpgtq: +; SSE: # BB#0: +; SSE-NEXT: psrad $31, %xmm0 +; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] +; SSE-NEXT: pcmpeqd %xmm0, %xmm0 +; SSE-NEXT: pxor %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: pcmpgtq: +; AVX: # BB#0: +; AVX-NEXT: vpsrad $31, %xmm0, %xmm0 +; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] +; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 +; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retq + %sign = ashr <2 x i64> %x, <i64 63, i64 63> + %not = xor <2 x i64> %sign, <i64 -1, i64 -1> + ret <2 x i64> %not +} + |
