diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_fptrunc.ll | 94 |
2 files changed, 49 insertions, 51 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 25d6408c698..4c1bdacd9d0 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -2288,6 +2288,9 @@ let Predicates = [HasAVX] in { let Predicates = [HasAVX, NoVLX] in { // Match fpround and fpextend for 128/256-bit conversions + def : Pat<(v4f32 (bitconvert (X86vzmovl (v2f64 (bitconvert + (v4f32 (X86vfpround (v2f64 VR128:$src)))))))), + (VCVTPD2PSrr VR128:$src)>; def : Pat<(v4f32 (X86vfpround (v2f64 VR128:$src))), (VCVTPD2PSrr VR128:$src)>; def : Pat<(v4f32 (X86vfpround (loadv2f64 addr:$src))), @@ -2307,6 +2310,9 @@ let Predicates = [HasAVX, NoVLX] in { let Predicates = [UseSSE2] in { // Match fpround and fpextend for 128 conversions + def : Pat<(v4f32 (bitconvert (X86vzmovl (v2f64 (bitconvert + (v4f32 (X86vfpround (v2f64 VR128:$src)))))))), + (CVTPD2PSrr VR128:$src)>; def : Pat<(v4f32 (X86vfpround (v2f64 VR128:$src))), (CVTPD2PSrr VR128:$src)>; def : Pat<(v4f32 (X86vfpround (memopv2f64 addr:$src))), diff --git a/llvm/test/CodeGen/X86/vec_fptrunc.ll b/llvm/test/CodeGen/X86/vec_fptrunc.ll index a13e1471392..6606c30ac22 100644 --- a/llvm/test/CodeGen/X86/vec_fptrunc.ll +++ b/llvm/test/CodeGen/X86/vec_fptrunc.ll @@ -135,62 +135,54 @@ entry: define <4 x float> @fptrunc_frommem2_zext(<2 x double> * %ld) { ; X32-SSE-LABEL: fptrunc_frommem2_zext: -; X32-SSE: # BB#0: -; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-SSE-NEXT: cvtpd2ps (%eax), %xmm0 -; X32-SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero -; X32-SSE-NEXT: retl -; -; X32-AVX-LABEL: fptrunc_frommem2_zext: -; X32-AVX: # BB#0: -; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-AVX-NEXT: vcvtpd2psx (%eax), %xmm0 -; X32-AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero -; X32-AVX-NEXT: retl -; -; X64-SSE-LABEL: fptrunc_frommem2_zext: -; X64-SSE: # BB#0: -; X64-SSE-NEXT: cvtpd2ps (%rdi), %xmm0 -; X64-SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero -; X64-SSE-NEXT: retq -; -; X64-AVX-LABEL: fptrunc_frommem2_zext: -; X64-AVX: # BB#0: -; X64-AVX-NEXT: vcvtpd2psx (%rdi), %xmm0 -; X64-AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero -; X64-AVX-NEXT: retq - %arg = load <2 x double>, <2 x double> * %ld, align 16 - %cvt = fptrunc <2 x double> %arg to <2 x float> +; X32-SSE: # BB#0:
+; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-SSE-NEXT: cvtpd2ps (%eax), %xmm0
+; X32-SSE-NEXT: retl
+;
+; X32-AVX-LABEL: fptrunc_frommem2_zext:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-AVX-NEXT: vcvtpd2psx (%eax), %xmm0
+; X32-AVX-NEXT: retl
+;
+; X64-SSE-LABEL: fptrunc_frommem2_zext:
+; X64-SSE: # BB#0:
+; X64-SSE-NEXT: cvtpd2ps (%rdi), %xmm0
+; X64-SSE-NEXT: retq
+;
+; X64-AVX-LABEL: fptrunc_frommem2_zext:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: vcvtpd2psx (%rdi), %xmm0
+; X64-AVX-NEXT: retq
+ %arg = load <2 x double>, <2 x double> * %ld, align 16
+ %cvt = fptrunc <2 x double> %arg to <2 x float>
%ret = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2> ret <4 x float> %ret } define <4 x float> @fptrunc_fromreg2_zext(<2 x double> %arg) { -; X32-SSE-LABEL: fptrunc_fromreg2_zext: -; X32-SSE: # BB#0: -; X32-SSE-NEXT: cvtpd2ps %xmm0, %xmm0 -; X32-SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero -; X32-SSE-NEXT: retl -; -; X32-AVX-LABEL: fptrunc_fromreg2_zext: -; X32-AVX: # BB#0: -; X32-AVX-NEXT: vcvtpd2ps %xmm0, %xmm0 -; X32-AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero -; X32-AVX-NEXT: retl -; -; X64-SSE-LABEL: fptrunc_fromreg2_zext: -; X64-SSE: # BB#0: -; X64-SSE-NEXT: cvtpd2ps %xmm0, %xmm0 -; X64-SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero -; X64-SSE-NEXT: retq -; -; X64-AVX-LABEL: fptrunc_fromreg2_zext: -; X64-AVX: # BB#0: -; X64-AVX-NEXT: vcvtpd2ps %xmm0, %xmm0 -; X64-AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero -; X64-AVX-NEXT: retq - %cvt = fptrunc <2 x double> %arg to <2 x float> - %ret = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2> +; X32-SSE-LABEL: fptrunc_fromreg2_zext:
+; X32-SSE: # BB#0:
+; X32-SSE-NEXT: cvtpd2ps %xmm0, %xmm0
+; X32-SSE-NEXT: retl
+;
+; X32-AVX-LABEL: fptrunc_fromreg2_zext:
+; X32-AVX: # BB#0:
+; X32-AVX-NEXT: vcvtpd2ps %xmm0, %xmm0
+; X32-AVX-NEXT: retl
+;
+; X64-SSE-LABEL: fptrunc_fromreg2_zext:
+; X64-SSE: # BB#0:
+; X64-SSE-NEXT: cvtpd2ps %xmm0, %xmm0
+; X64-SSE-NEXT: retq
+;
+; X64-AVX-LABEL: fptrunc_fromreg2_zext:
+; X64-AVX: # BB#0:
+; X64-AVX-NEXT: vcvtpd2ps %xmm0, %xmm0
+; X64-AVX-NEXT: retq
+ %cvt = fptrunc <2 x double> %arg to <2 x float>
+ %ret = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
ret <4 x float> %ret } |
