diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index eeab4821e50..0c35c2757a1 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -658,10 +658,22 @@ bool SITargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm, } bool SITargetLowering::isTypeDesirableForOp(unsigned Op, EVT VT) const { - - // i16 is not desirable unless it is a load or a store. - if (VT == MVT::i16 && Op != ISD::LOAD && Op != ISD::STORE) - return false; + if (Subtarget->has16BitInsts() && VT == MVT::i16) { + switch (Op) { + case ISD::LOAD: + case ISD::STORE: + + // These operations are done with 32-bit instructions anyway. + case ISD::AND: + case ISD::OR: + case ISD::XOR: + case ISD::SELECT: + // TODO: Extensions? + return true; + default: + return false; + } + } // SimplifySetCC uses this function to determine whether or not it should // create setcc with i1 operands. We don't have instructions for i1 setcc. |
