diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/pie.ll | 18 |
2 files changed, 24 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index b28119e9b58..ef7304dafd3 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -24,6 +24,7 @@ #include "llvm/ADT/Statistic.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/StringSwitch.h" +#include "llvm/CodeGen/Analysis.h" #include "llvm/CodeGen/CallingConvLower.h" #include "llvm/CodeGen/IntrinsicLowering.h" #include "llvm/CodeGen/MachineBasicBlock.h" @@ -2792,9 +2793,12 @@ SDValue ARMTargetLowering::LowerGlobalAddressELF(SDValue Op, EVT PtrVT = getPointerTy(DAG.getDataLayout()); SDLoc dl(Op); const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); - if (getTargetMachine().getRelocationModel() == Reloc::PIC_) { + const TargetMachine &TM = getTargetMachine(); + Reloc::Model RM = TM.getRelocationModel(); + const Triple &TargetTriple = TM.getTargetTriple(); + if (RM == Reloc::PIC_) { bool UseGOT_PREL = - !(GV->hasHiddenVisibility() || GV->hasLocalLinkage()); + !shouldAssumeDSOLocal(RM, TargetTriple, *GV->getParent(), GV); MachineFunction &MF = DAG.getMachineFunction(); ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); diff --git a/llvm/test/CodeGen/ARM/pie.ll b/llvm/test/CodeGen/ARM/pie.ll new file mode 100644 index 00000000000..1b1e6e62fda --- /dev/null +++ b/llvm/test/CodeGen/ARM/pie.ll @@ -0,0 +1,18 @@ +; RUN: llc -mtriple=armv7-pc-linux-gnueabi -relocation-model=pic < %s | FileCheck %s + +@foo = global i32 42 + +define i32* @get_foo() { + ret i32* @foo +} + +; Test that we only use one load. Even that is only needed because there +; doesn't seem to be pc relative relocations for movw movt. +; CHECK: ldr r0, .LCPI0_0 +; CHECK-NEXT: .L{{.*}}: +; CHECK-NEXT: add r0, pc, r0 +; CHECK-NEXT: bx lr + +!llvm.module.flags = !{!0} + +!0 = !{i32 1, !"PIE Level", i32 2} |
